TDA5230 Infineon Technologies, TDA5230 Datasheet - Page 174

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TDA5230

Manufacturer Part Number
TDA5230
Description
IC RECEIVER ASK/FSK 28-TSSOP
Manufacturer
Infineon Technologies
Type
Receiverr
Datasheet

Specifications of TDA5230

Package / Case
28-TSSOP
Frequency
433MHz ~ 450MHz, 865MHz ~ 868MHz
Sensitivity
-111dBm
Data Rate - Maximum
20 kbps
Modulation Or Protocol
ASK, FSK
Applications
RKE, TPM, Security Systems
Current - Receiving
8mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
3 V ~ 3.6 V, 4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 105°C
Operating Frequency
870 MHz
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
SP000076520
TDA5230
TDA5230INTR

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Data Sheet
Unless explicitly otherwise noted, the following test conditions apply to the given
specification values in Tables 7..12:
TDA5230:
* Hardware: Testboard TDA523x V2.1
* Single-Ended Matching for 433.92 MHz
* Receive Frequency 433.92 MHz; Lo-Side LO-Injection
* Reference-Clock: XTAL=13.225625 MHz; RF-PLL: R=2, S=0
TDA5231:
* Hardware: Testboard TDA523x V2.1
* Single-Ended Matching for 315.00 MHz
* Receive Frequency 315.00MHz; Hi-Side LO-Injection
* Reference-Clock: XTAL=15.2671875 MHz; RF-PLL: R=2, S=0
TDA5230 and TDA5231:
* IF-Gain: Attenuation set to minimum
* IF-Filter: Center=10.7MHz; BW=280kHz; Connected between IF-OUT and LIM-IN+
* Received-Signal at zero Offset to IF Center Frequency
* RSSI trimmed
* FSK-Demodulator Pre-filter BW +/-250
* No SPI-traffic during telegram reception, CLKOUT disabled
* Specification values are in respect to Manchester-coded Reference Protocol
* DRE ... Data-Rate Error of received telegram vs. adjusted Data-Rate
* DC ... Duty-Cycle
* MER ... Message Error Rate
* FAR ... False Alarm Rate
* MMR ... Missed Message Rate
(11 Bits '0' ,1 Bit ’1' , PRBS5 (31 Bit), 1 Bit 'M') according to
(duration of first chip of manchester-coded bit in respect to duration of complete bit according to
[MER = 1 - (number_of_correctly_received_messages / number_of_transmitted messages)]
[FAR = number_of_mistakenly_wake_ups / number_of_periods_searching_for_data_on_channel]
[MMR = number_of_mistakenly_missed_wake_up_patterns /
number_of_periods_with_wake_up_pattern_transmitted_and_searching_for_wake_up_pattern]
170
Figure 37
Version 4.0, 2007-06-01
Specifications
TDA523x
Figure
37)

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