TDA5230 Infineon Technologies, TDA5230 Datasheet - Page 58

• Manufacturer Part Number: TDA5230
• Description: IC RECEIVER ASK/FSK 28-TSSOP
• Manufacturer: Infineon Technologies
• Type: Receiverr

Specifications of TDA5230

• Package / Case: 28-TSSOP
• Frequency: 433MHz ~ 450MHz, 865MHz ~ 868MHz
• Sensitivity: -111dBm
• Data Rate - Maximum: 20 kbps
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, TPM, Security Systems
• Current - Receiving: 8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 3 V ~ 3.6 V, 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Operating Frequency: 870 MHz
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: SP000076520; TDA5230; TDA5230INTR

Calculation of the Off Time
The Off Time is the Master Period minus the sum of all On Times.
T
Note: Use the TDA523x IAF Configuration Tool to translate the calculated values into
register settings. Enter On Times and Off Time as calculated. Watch the Master Period
and vary Off Time till the resulting Master Period is shorter than the result of the
calculation. Take care that T
than the calculated values!
2.4.6.3
This mode is used to switch off the receiver as quickly as possible to reduce power
consumption.
During the search for a wake up pattern, a check is performed in parallel to determine, if
there is a bit stream, to which it can be synchronized. If within the limits of the Sync
Search Time Out there is no synchronization to a bit stream, the wake up search for this
channel is stopped. If synchronization to a bit stream is possible (and not lost again), the
chip waits if the wake up criterion is fulfilled. If the Wake Up Criterion is not fulfilled, if in
worst case, the last bit of an expected wake up pattern is wrong, the wake up procedure
for this channel is stopped, and the chip tries to synchronize on the next channel, or falls
back to sleep. That means, that the effective search time and, consequently, the receiver
active time are significantly shorter, and power consumption is reduced when no input
signal is present. Calculation of Sync Search Time Out is found in
Synchronization Search Time and Inter-Frame
The On and Off Time settings are different from the Constant On/Off Time Mode. The
BSPMONT register is not used because the whole On time is defined in the ASPMONT
register. Regardless of the numbers of channels and whether dual or single configuration
is used, the on time is defined with the Config A On Timer. The deactivation of the
receiver can happen at different times, but this event does not influence the timer stage
because the On time is still the same. So the master period is constant. The following
scenarios are the same as before, but with Fast Fall Back to Sleep.
Data Sheet
OFF
=T
MasterPeriod
Fast Fall Back To Sleep
-3*T
ON_ConfigA
-2*T
ON
must be always longer and T
ON_ConfigB
=179.26ms-3*2.55ms-2*3.98ms=163.65ms
54
Time.
MasterPeriod
Functional Description
Version 4.0, 2007-06-01
Chapter 2.4.9.1
always shorter
TDA523x