ATMEGA64RZAPV-10MU Atmel, ATMEGA64RZAPV-10MU Datasheet - Page 5

BUNDLE ATMEGA644P/AT86RF230 QFN

ATMEGA64RZAPV-10MU

Manufacturer Part Number
ATMEGA64RZAPV-10MU
Description
BUNDLE ATMEGA644P/AT86RF230 QFN
Manufacturer
Atmel
Series
ATMEGAr
Datasheet

Specifications of ATMEGA64RZAPV-10MU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
64-QFN
Wireless Frequency
2.4 GHz
Interface Type
SPI, USART
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
3.4.1 SPI Lines
3.4.2 IRQ Line
3.4.3 SLP_TR Line
8051A-AVR-11/06
transceiver to the AVR microcontroller. Only a few of the available pins are used to
control the radio transceiver. The reminder of this subsection describes the interface
necessary to control the radio transceiver.
Figure 3-4 Expansion Connector 1 Pin-out
The SPI is used to program control registers as well as to transfer data frames
between the AVR and the AT86RF230. Each access is initiated with the SPI master
(AVR) pulling the slave select (SS/SEL) line low. Both master and slave (AT86RF230)
will now prepare the data to be sent, and the master generates the necessary clock
pulses on the SCLK line to interchange the data. Data is always transferred from
master to slave on the Master Out – Slave In, MOSI line, and from slave to master on
the Master In – Slave Out, MISO line. When a packet has been transmitted, the
master will pull high the slave select line to synchronize the slave.
The AT86RF230 has six different interrupts defined. However, all these interrupt
signals are combined internally via a logical “OR” operation to one external interrupt
line. An interrupt is indicated to the AVR microcontroller whenever the IRQ line is
pulled high (logical 1). The controller must poll the AT86RF230 to determine the
interrupt source and to clear the IRQ line.
The SLP_TR signal is a multi-functional pin. It can be used as either a transmit start
or a sleep signal. Pin functionality is dependant upon the transceiver’s internal state.
Please consult the datasheet of the AT86RF230 for more information.
AVR414
5

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