ATA5771-PXQW Atmel, ATA5771-PXQW Datasheet - Page 22

XMITTR UHF ASK/FSK 868MHZ 24VQFN

ATA5771-PXQW

Manufacturer Part Number
ATA5771-PXQW
Description
XMITTR UHF ASK/FSK 868MHZ 24VQFN
Manufacturer
Atmel
Datasheet

Specifications of ATA5771-PXQW

Frequency
868MHz ~ 928MHz
Modulation Or Protocol
UHF
Power - Output
8dBm
Voltage - Supply
2 V ~ 4 V
Current - Transmitting
9.8mA
Data Interface
PCB, Surface Mount
Memory Size
4kB Flash, 256B EEPROM, 256B SRAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Processor Series
ATA5x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
4 KB
Data Ram Size
256 B
Interface Type
SPI, USI
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Sensitivity
-
Data Rate - Maximum
-
Current - Receiving
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA5771-PXQW
Manufacturer:
ATMEL
Quantity:
218
4.8
4.8.1
4.8.2
22
Memories
Atmel ATA5771/73/74
In-System Re-programmable Flash Program Memory
SRAM Data Memory
This section describes the different memories in the Atmel
architecture has two main memory spaces, the Data memory and the Program memory
space. In addition, the ATtiny44V features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
The ATtiny44V contains 4K byte On-chip In-System Reprogrammable Flash memory for pro-
gram storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as
2048 x 16.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATtiny44V
Program Counter (PC) is 11 bits wide, thus addressing the 2048 Program memory locations.
Section 4.23 “Memory Programming” on page 166
data serial downloading using the SPI pins.
Constant tables can be allocated within the entire Program memory address space (see the
LPM – Load Program Memory Instruction description).
Timing diagrams for instruction fetch and execution are presented in
Figure 4-7.
Figure 4-8 on page 23
The lower 160 Data memory locations address both the Register File, the I/O memory and the
internal data SRAM. The first 32 locations address the Register File, the next 64 locations the
standard I/O memory, and the last 256 locations address the internal data SRAM.
The five different addressing modes for the Data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address
given by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
Program Memory Map
shows how the ATtiny44V SRAM Memory is organized.
Program Memory
contains a detailed description on Flash
0x07FF
0x0000
®
ATtiny44V. The Atmel AVR
Figure
4-7.
9137E–RKE–12/10
®

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