ATA8742-PXQW Atmel, ATA8742-PXQW Datasheet - Page 56

MCU W/TRANSMITTER ASK/FSK 24QFN

ATA8742-PXQW

Manufacturer Part Number
ATA8742-PXQW
Description
MCU W/TRANSMITTER ASK/FSK 24QFN
Manufacturer
Atmel
Datasheet

Specifications of ATA8742-PXQW

Frequency
433MHz
Applications
Home Automation, Remote Sensing, RKE
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
32 kBit/s
Power - Output
7.5dBm
Current - Transmitting
9.8mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
4kB Flash, 256B EEPROM, 256B SRAM
Voltage - Supply
2 V ~ 4 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Processor Series
ATA8x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
4 KB
Data Ram Size
256 B
Interface Type
SPI, USI
Maximum Clock Frequency
8.1 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA8742-PXQW
Manufacturer:
ATMEL
Quantity:
1 482
16.0.3
56
ATA8742
Power-on Reset
Figure 16-1. Reset Logic
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in
ever V
as well as to detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V
when V
Figure 16-2. MCU Start-up, RESET Tied to V
INTERNAL
V
TIME-OUT
BODLEVEL [1..0]
CC
CC
CC
RESET
RESET
is below the detection level. The POR circuit can be used to trigger the Start-up Reset,
decreases below the detection level.
V
“System and Reset Characterizations” on page
CCRR
Pull-up Resistor
FILTER
SPIKE
V
V
V
RST
PORMA X
PORMIN
CC
t
TOUT
CKSEL[1:0]
rise. The RESET signal is activated again, without any delay,
Power-on Reset
Reset Circuit
SUT[1:0]
Brown-out
Watchdog
Oscillator
Generator
Circuit
Clock
CK
CC
Register (MCUSR)
MCU Status
DATA BUS
Delay Counters
198. The POR is activated when-
TIMEOUT
9151A–INDCO–07/09

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