XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 357
XRT94L33IB-L
Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Specifications of XRT94L33IB-L
Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Receive STS-3 Transport – REI-L Error Count Register – Byte 3 (Address = 0x1118)
Receive STS-3 Transport – REI-L Error Count Register – Byte 2 (Address = 0x1119)
Receive STS-3 Transport – REI-L Error Count Register – Byte 1 (Address = 0x111A)
Receive STS-3 Transport – REI-L Error Count Register – Byte 0 (Address = 0x111B)
Note:
2.3.1.6.1
The user can configure the Receive STS-3 TOH Processor block to increment the “Receive STS-3 Transport
– REI-L Error Count” Register by the contents within the M1 byte, within each incoming STS-3 frame.
Therefore, in this mode, it is possible for the Receive STS-3 TOH Processor block to increment this register
by as much as the value “24” for each STS-3 frame.
The user can implement this configuration by setting Bit 2 (REI-L Error Type) within the “Receive STS-3
Transport – Control Register – Byte 0” to “0”, as illustrated below.
Receive STS-3c Transport Control Register – Byte 0 (Address = 0x1103)
Unused
B
B
B
B
B
RUR
RUR
RUR
RUR
R/O
IT
IT
IT
IT
IT
0
0
0
0
0
7
7
7
7
7
The Receive STS-3 TOH Processor block will increment these registers either by the number of erred STS-3
Frames (e.g., STS-3 frames with a non-zero REI-L value) detected, or by the value of the REI-L value, within
the M1 byte of a given STS-3 frame; depending upon the user’s selection, as described below.
Configuring the Receive STS-3 TOH Processor block to increment the “Receive STS-3
Transport – REI-L Error Count” Register on an “REI-L Value” basis
SF Detect
Enable
B
R/W
B
RUR
B
RUR
B
RUR
B
RUR
IT
0
IT
IT
IT
IT
0
0
0
0
6
6
6
6
6
SD Detect
Enable
B
R/W
B
RUR
B
RUR
B
RUR
B
RUR
IT
0
IT
IT
IT
IT
0
0
0
0
5
5
5
5
5
Descramble
REI_L_Error_Count[31:24]
REI_L_Error_Count[23:16]
REI_L_Error_Count[15:8]
REI_L_Error_Count[7:0]
Disable
B
R/W
B
RUR
B
RUR
B
RUR
B
RUR
IT
0
IT
IT
IT
IT
0
0
0
0
4
4
4
4
4
357
SDH/SONET*
B
RUR
B
RUR
B
RUR
B
RUR
B
R/W
IT
IT
IT
IT
0
0
0
0
IT
0
3
3
3
3
3
REI-L Error
B
RUR
B
RUR
B
RUR
B
RUR
B
Type
R/W
IT
IT
IT
IT
0
0
0
0
IT
0
2
2
2
2
2
B2 Error
B
RUR
B
RUR
B
RUR
B
RUR
B
Type
R/W
IT
IT
IT
IT
0
0
0
0
IT
0
1
1
1
1
1
XRT94L33
B1 Error
Rev.1.2.0.
B
RUR
B
RUR
B
RUR
B
RUR
B
Type
R/W
IT
IT
IT
IT
0
0
0
0
IT
0
0
0
0
0
0
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