NUC100LC1BN Nuvoton Technology Corporation of America, NUC100LC1BN Datasheet - Page 253

• Manufacturer Part Number: NUC100LC1BN
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™r

Specifications of NUC100LC1BN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

GPIO Port [A/B/C/D/E] Interrupt Mode Control (GPIOx _IMD)
Register
GPIOA_IMD
GPIOB_IMD
GPIOC_IMD
GPIOD_IMD
GPIOE_IMD
Bits
[31:16]
[n]
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Offset
GP_BA+0x018
GP_BA+0x058
GP_BA+0x098
GP_BA+0x0D8
GP_BA+0x118
Descriptions
Reserved
IMD[n]
30
22
14
6
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
Port [A/B/C/D/E] Edge or Level Detection Interrupt Control
IMD[n] is used to control the interrupt is by level trigger or by edge trigger. If the
interrupt is by edge trigger, the trigger source can be controlled by de-bounce. If the
interrupt is by level trigger, the input source is sampled by one HCLK clock and
generates the interrupt.
1 = Level trigger interrupt
0 = Edge trigger interrupt
If set pin as the level trigger interrupt, then only one level can be set on the registers
GPIOx_IEN. If set both the level to trigger interrupt, the setting is ignored and no
interrupt will occur
The de-bounce function is valid for edge triggered interrupt. If the interrupt mode is
level triggered, the de-bounce enable bit is ignored.
29
21
13
5
Description
GPIO Port A Interrupt Mode Control
GPIO Port B Interrupt Mode Control
GPIO Port C Interrupt Mode Control
GPIO Port D Interrupt Mode Control
GPIO Port E Interrupt Mode Control
28
20
12
4
- 253 -
Reserved
Reserved
IMD[15:8]
IMD[7:0]
27
19
11
3
Publication Release Date: Oct 22, 2010
26
18
10
2
25
17
9
1
Revision V1.06
Reset Value
0xXXXX_0000
0xXXXX_0000
0xXXXX_0000
0xXXXX_0000
0xXXXX_0000
24
16
8
0