NUC100LC1BN Nuvoton Technology Corporation of America, NUC100LC1BN Datasheet - Page 256

• Manufacturer Part Number: NUC100LC1BN
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™r

Specifications of NUC100LC1BN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Interrupt De-bounce Cycle Control (DBNCECON)
Register
DBNCECON
Bits
[5]
[4]
[3:0]
31
23
15
7
Reserved
NuMicro™ NUC100 Series Technical Reference Manual
Offset
GP_BA+0x180
Descriptions
ICLK_ON
DBCLKSRC
DBCLKSEL
30
22
14
6
ICLK_ON
R/W
R/W
Interrupt clock On mode
Set this bit to 0 will disable the interrupt generate circuit clock, if the pin[n] interrupt is
disabled
1 = Interrupt generated circuit clock always enable
0 = Disable the clock if the GPIOA/B/C/D/E[n] interrupt is disabled
De-bounce counter clock source select
1 = De-bounce counter clock source is the internal 10 kHz clock
0 = De-bounce counter clock source is the HCLK
De-bounce sampling cycle selection
29
21
13
5
DBCLKSEL
Description
External Interrupt De-bounce Control
10
11
0
1
2
3
4
5
6
7
8
9
DBCLKSRC
28
20
12
4
- 256 -
Reserved
Reserved
Reserved
Description
Sample interrupt input once per 1 clocks
Sample interrupt input once per 2 clocks
Sample interrupt input once per 4 clocks
Sample interrupt input once per 8 clocks
Sample interrupt input once per 16 clocks
Sample interrupt input once per 32 clocks
Sample interrupt input once per 64 clocks
Sample interrupt input once per 128 clocks
Sample interrupt input once per 256 clocks
Sample interrupt input once per 2*256 clocks
Sample interrupt input once per 4*256clocks
Sample interrupt input once per 8*256 clocks
27
19
11
3
Publication Release Date: Dec. 22, 2010
26
18
10
2
DBCLKSEL
25
17
9
1
Revision V1.06
Reset Value
0x0000_0020
24
16
8
0