NUC100LC1BN Nuvoton Technology Corporation of America, NUC100LC1BN Datasheet - Page 399

IC MCU 32BIT 32KB FLASH 48LQFP

NUC100LC1BN

Manufacturer Part Number
NUC100LC1BN
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Datasheets

Specifications of NUC100LC1BN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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[3]
[2]
[1]
[0]
NuMicro™ NUC100 Series Technical Reference Manual
Reserved
TFR
RFR
Reserved
When the number of bytes in the receive FIFO equals the RFITL then the RDA_IF will
be set (if UA_IER [RDA_IEN] is enable, an interrupt will generated).
Reserved
TX Field Software Reset
When TX_RST is set, all the byte in the transmit FIFO and TX internal state machine
are cleared.
1 = Writing 1 to this bit will reset the TX internal state machine and pointers.
0 = Writing 0 to this bit has no effect.
Note: This bit will auto clear needs at least 3 UART engine clock cycles.
RX Field Software Reset
When RX_RST is set, all the byte in the receiver FIFO and RX internal state machine
are cleared.
1 = Writing 1 to this bit will reset the RX internal state machine and pointers.
0 = Writing 0 to this bit has no effect.
Note: This bit will auto clear needs at least 3 UART engine clock cycles.
Reserved
RFITL
0000
0001
0010
0011
0100
0101
0110
others
- 399 -
INTR_RDA Trigger Level (Bytes)
01
04
08
14
30/14 (High Speed/Normal Speed)
46/14 (High Speed/Normal Speed)
62/14 (High Speed/Normal Speed)
62/14 (High Speed/Normal Speed)
Publication Release Date: Oct 22, 2010
Revision V1.06

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