NUC100LC1BN Nuvoton Technology Corporation of America, NUC100LC1BN Datasheet - Page 405

• Manufacturer Part Number: NUC100LC1BN
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™r

Specifications of NUC100LC1BN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

FIFO Status Register (UA_FSR)
Register
UA_FSR
Bits
[31:29]
[28]
[27:25]
[24]
[23]
[22]
[21:16]
RX_FULL
Reserved
TX_FULL
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Descriptions
Reserved
TE_FLAG
Reserved
TX_OVER_IF
TX_FULL
TX_EMPTY
TX_POINTER
RX_EMPTY
TX_EMPTY
Offset
UART0_BA+0x18
UART1_BA+0x18
UART2_BA+0x18
Reserved
BIF
30
22
14
6
FEF
29
21
13
Reserved
Transmitter Empty Flag (Read Only)
Bit is set by hardware when TX FIFO (UA_THR) is empty and the STOP bit of the
last byte has been transmitted.
Bit is cleared automatically when TX FIFO is not empty or the last byte transmission
has not completed.
Reserved
TX Overflow Error Interrupt Flag (Read Only)
If TX FIFO (UA_THR) is full, an additional write to UA_THR will cause this bit to logic
1.
Note: This bit is read only, but can be cleared by writing ‘1’ to it.
Transmitter FIFO Full (Read Only)
This bit indicates TX FIFO full or not.
This bit is set when TX_POINTER is equal to 64/16(UART0/UART1), otherwise is
cleared by hardware.
Transmitter FIFO Empty (Read Only)
This bit indicates TX FIFO empty or not.
When the last byte of TX FIFO has been transferred to Transmitter Shift Register,
hardware sets this bit high. It will be cleared when writing data into THR (TX FIFO not
empty).
TX FIFO Pointer (Read Only)
This field indicates the TX FIFO Buffer Pointer. When CPU writes one byte into
UA_THR, TX_POINTER increases one. When one byte of TX FIFO is transferred to
5
R/W
R/W
R/W
R/W
Description
UART0 FIFO Status Register
UART1 FIFO Status Register
UART2 FIFO Status Register
TE_FLAG
PEF
28
20
12
4
- 405 -
RS485_ADD_
DETF
27
19
11
3
RX_POINTER
TX_POINTER
Publication Release Date: Oct 22, 2010
Reserved
26
18
10
2
Reserved
25
17
9
1
Revision V1.06
Reset Value
0x1040_4000
0x1040_4000
0x1040_4000
RX_OVER_IF
TX_OVER_IF
24
16
8
0