ATMEGA128A-MNR Atmel, ATMEGA128A-MNR Datasheet - Page 171
ATMEGA128A-MNR
Manufacturer Part Number
ATMEGA128A-MNR
Description
IC MCU AVR 128K FLASH 64VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128A-MNR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Core
AVR8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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19.5
19.5.1
8151H–AVR–02/11
Register Description
SPCR - SPI Control Register
Figure 1. SPI Transfer Format with CPHA = 0
Figure 2. SPI Transfer Format with CPHA = 1
• Bit 7 – SPIE: SPI Interrupt Enable
This bit causes the SPI interrupt to be executed if SPIF bit in the SPSR Register is set and the if
the global interrupt enable bit in SREG is set.
• Bit 6 – SPE: SPI Enable
When the SPE bit is written to one, the SPI is enabled. This bit must be set to enable any SPI
operations.
Bit
Read/Write
Initial Value
SCK (CPOL = 0)
mode 1
SCK (CPOL = 1)
mode 3
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SS
SCK (CPOL = 0)
mode 0
SCK (CPOL = 1)
mode 2
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SS
MSB first (DORD = 0)
LSB first (DORD = 1)
MSB first (DORD = 0)
LSB first (DORD = 1)
SPIE
R/W
7
0
SPE
R/W
MSB
LSB
6
0
MSB
LSB
DORD
Bit 6
Bit 1
R/W
5
0
Bit 6
Bit 1
Bit 5
Bit 2
MSTR
R/W
4
0
Bit 5
Bit 2
Bit 4
Bit 3
CPOL
R/W
Bit 4
Bit 3
3
0
Bit 3
Bit 4
CPHA
Bit 3
Bit 4
R/W
2
0
Bit 2
Bit 5
Bit 2
Bit 5
SPR1
ATmega128A
R/W
1
0
Bit 1
Bit 6
Bit 1
Bit 6
SPR0
R/W
0
0
LSB
MSB
LSB
MSB
SPCR
171
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