MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1217
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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14.8.156 DRAM Control Register 161 (HW_DRAM_CTL161)
This is a DRAM configuration register.
Address:
Re-
14.8.157 DRAM Control Register 162 (HW_DRAM_CTL162)
This is a DRAM configuration register.
Address:
Re-
Freescale Semiconductor, Inc.
set
set
DLL_OBS_REG_
Bit
DLL_OBS_REG_
Bit
W2R_SAMECS_
W
W
R
R
31
31
0
0
RSVD3
31 27
26 24
31 0
31 0
Field
Field
Field
DLY
3_3
3_3
30
30
0
0
RSVD3
29
29
0
0
HW_DRAM_CTL161
HW_DRAM_CTL162
28
28
0
0
Reports the clk_wr delay value for data slice 3. READ-ONLY.
Reports the clk_wr delay value for data slice 3. READ-ONLY.
Always write zeroes to this field.
Additional delay to insert between writes and reads to the same chip select.
Defines the number of additional clocks of delay to insert from a write command to a read command to the
same chip select.
27
27
0
0
26
26
SAMECS_
0
0
W2R_
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
DLY
25
25
0
0
24
24
0
0
23
23
0
0
HW_DRAM_CTL160 field descriptions
HW_DRAM_CTL161 field descriptions
HW_DRAM_CTL162 field descriptions
800E_0000h base + 284h offset = 800E_0284h
800E_0000h base + 288h offset = 800E_0288h
22
22
0
0
RSVD2
21
21
0
0
20
20
0
0
19
19
0
0
DLL_OBS_REG_3_3
18
18
DIFFCS_
0
0
W2R_
DLY
17
17
0
0
16
16
0
0
15
15
0
0
Description
Description
Description
14
14
0
0
13
13
0
0
RSVD1
12
12
0
0
Chapter 14 External Memory Interface (EMI)
11
11
0
0
10
10
0
0
0
0
9
9
0
0
8
8
0
0
7
7
DLL_OBS_REG_3_3
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
1217
0
0
0
0
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