MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1274
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 1274 of 2327
- Download datasheet (17Mb)
Programming the BCH/GPMI Interfaces
write[2].dma_bar = &nand_cmd_addr_buffer[6];
command
// 3 words sent to the GPMI
write[2].gpmi_ctrl0 = BV_FLD(GPMI_CTRL0, COMMAND_MODE, WRITE)
write[2].gpmi_compare = NULL;
eccctrl
write[2].gpmi_eccctrl = BV_FLD(GPMI_ECCCTRL, ENABLE_ECC, DISABLE); // disable the ECC block
//----------------------------------------------------------------------------
// Descriptor 4: wait for ready (CLE)
//----------------------------------------------------------------------------
write[3].dma_nxtcmdar = &write[4];
write[3].dma_cmd = BF_APBH_CHn_CMD_XFER_COUNT
write[3].dma_bar = NULL;
// 1 word sent to the GPMI
write[3].gpmi_ctrl0 = BV_FLD(GPMI_CTRL0, COMMAND_MODE, WAIT_FOR_READY) | // wait for NAND ready
//----------------------------------------------------------------------------
// Descriptor 5: psense compare (time out check)
//----------------------------------------------------------------------------
write[4].dma_nxtcmdar = &write[5];
write[4].dma_cmd = BF_APBH_CHn_CMD_XFER_COUNT
write[4].dma_bar = dma_error_handler;
handler
//----------------------------------------------------------------------------
// Descriptor 6: issue NAND status command (CLE)
//----------------------------------------------------------------------------
write[5].dma_nxtcmdar = &write[6];
write[5].dma_cmd = BF_APBH_CHn_CMD_XFER_COUNT
1274
BV_FLD(APBH_CHn_CMD, COMMAND, DMA_READ);
BF_GPMI_CTRL0_CS
BF_APBH_CHn_CMD_WAIT4ENDCMD
BF_GPMI_CTRL0_CS
BF_APBH_CHn_CMD_NANDWAIT4READY(0) |
BF_APBH_CHn_CMD_NANDLOCK
BF_APBH_CHn_CMD_IRQONCMPLT
BF_APBH_CHn_CMD_CHAIN
BF_APBH_CHn_CMD_CMDWORDS
BF_APBH_CHn_CMD_WAIT4ENDCMD
BF_APBH_CHn_CMD_SEMAPHORE
BF_APBH_CHn_CMD_NANDWAIT4READY(1) |
BF_APBH_CHn_CMD_NANDLOCK
BF_APBH_CHn_CMD_IRQONCMPLT
BF_APBH_CHn_CMD_CHAIN
BV_FLD(APBH_CHn_CMD, COMMAND, NO_DMA_XFER);
BF_APBH_CHn_CMD_CMDWORDS
BF_APBH_CHn_CMD_WAIT4ENDCMD
BF_APBH_CHn_CMD_SEMAPHORE
BF_APBH_CHn_CMD_NANDWAIT4READY(0)
BF_APBH_CHn_CMD_NANDLOCK
BF_APBH_CHn_CMD_IRQONCMPLT
BF_APBH_CHn_CMD_CHAIN
BV_FLD(APBH_CHn_CMD, COMMAND, DMA_SENSE);
BF_APBH_CHn_CMD_CMDWORDS
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
BV_FLD(GPMI_CTRL0, WORD_LENGTH,
BV_FLD(GPMI_CTRL0, LOCK_CS,
BV_FLD(GPMI_CTRL0, ADDRESS,
BF_GPMI_CTRL0_ADDRESS_INCREMENT
BF_GPMI_CTRL0_XFER_COUNT
BV_FLD(GPMI_CTRL0, WORD_LENGTH,
BV_FLD(GPMI_CTRL0, LOCK_CS,
BV_FLD(GPMI_CTRL0, ADDRESS,
BF_GPMI_CTRL0_ADDRESS_INCREMENT
BF_GPMI_CTRL0_XFER_COUNT
(2)
(1)
(2)
(1) |
(0) |
(1) |
(0) |
(1) |
(1) |
(0) |
(0) |
(0) |
(1) |
(0)
(0)
(0)
(0)
(0)
(0)
(1)
(1)
(3)
// if sense check fails, branch to error
// field not used but necessary to set
|
8_BIT)
ENABLED)
NAND_CLE) |
(0)
(1);
8_BIT)
DISABLED)
NAND_DATA)
(0)
(0);
|
|
// point to byte 6, write execute
// point to the next descriptor
// no dma transfer
// send 1 word to the GPMI
// wait for command to finish before
//
// wait for nand to be ready
// relinquish nand lock
// follow chain to next command
// wait for command to finish before
| // must correspond to NAND CS used
| // must correspond to NAND CS used
// read data from DMA, write to NAND
// maintain resource lock
// follow chain to next command
// point to the next descriptor
// 1 byte command
// send 3 words to the GPMI
| // no dma transfer
| // no words sent to GPMI
| // do not wait to continue
|
|
|
|
| // follow chain to next command
// point to the next descriptor
// perform a sense check
| // write to the NAND
|
|
|
continuing
// 1 byte command
|
|
|
|
Freescale Semiconductor, Inc.
// no dma transfer
// field not used
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