MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1804
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 1804 of 2327
- Download datasheet (17Mb)
Programmable Registers
28.4.18 PWM Version Register (HW_PWM_VERSION)
This register indicates the version of the block for debug purposes.
EXAMPLE
if (HW_PWM_VERSION.B.MAJOR != 1) Error();
Address:
Re-
1804
set
Bit
W
ACTIVE_STATE
R
INACTIVE_
31
0
PERIOD
MAJOR
MINOR
STATE
19 18
17 16
31 24
23 16
STEP
Field
15 0
Field
15 0
30
0
29
0
MAJOR
HW_PWM_VERSION
28
0
0x6
0x7
The logical inactive state that is mapped to the PWM output signal. Note that the undefined state of 0x1 is
mapped to high-impedance.
0x0
0x2
0x3
The logical active state is mapped to the PWM output signal. Note that the undefined state of 0x1 is mapped
to high-impedance.
0x0
0x2
0x3
Number of divided clock cycles in the entire period of the PWM waveform, minus 1. For example, to obtain
6 clock cycles in the actual period, set this field to 5.
Fixed read-only value reflecting the MAJOR field of the RTL version.
Fixed read-only value reflecting the MINOR field of the RTL version.
Fixed read-only value reflecting the stepping of the RTL version.
27
0
26
0
DIV_256 — Divide by 256.
DIV_1024 — Divide by 1024.
HI_Z — Inactive state sets PWM output to high-impedance.
0 — Inactive state sets PWM output to 0 (low).
1 — Inactive state sets PWM output to 1 (high).
HI_Z — Active state sets PWM output to high-impedance.
0 — Active state sets PWM output to 0 (low).
1 — Active state sets PWM output to 1 (high).
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_PWM_PERIOD7 field descriptions (continued)
25
0
24
1
23
0
HW_PWM_VERSION field descriptions
22
0
8006_4000h base + 110h offset = 8006_4110h
21
0
MINOR
20
0
19
0
18
1
17
1
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
STEP
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0
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