MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1839
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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29.9 Programmable Registers
The SWITCH module implements a register space of 1K 32-bit registers, base address is
0x800F8000. All writes must provide 32-bit of data and all reads return 32-bits of data.
Reserved bits should be written with 0 and ignored on read to allow future extension. Unused
registers read back 0 and a write has no effect.
Freescale Semiconductor, Inc.
800F_801C
800F_802C
800F_8000
800F_8000
800F_8004
800F_8008
800F_8010
800F_8014
800F_8018
800F_8020
800F_8024
800F_8028
800F_8030
Absolute
address
(hex)
ENET SWI revision (HW_ENET_SWI_REVISION)
ENET SWI lookup MAC address memory start
(HW_ENET_SWI_LOOKUP_MEMORY_START)
ENET SWI Scratch Register (HW_ENET_SWI_SCRATCH)
ENET SWI Port Enable Bits. (HW_ENET_SWI_PORT_ENA)
ENET SWI Verify VLAN domain.
(HW_ENET_SWI_VLAN_VERIFY)
ENET SWI Default broadcast resolution.
(HW_ENET_SWI_BCAST_DEFAULT_MASK)
ENET SWI Default multicast resolution.
(HW_ENET_SWI_MCAST_DEFAULT_MASK)
ENET SWI Define port in blocking state and enable or disable
learning. (HW_ENET_SWI_INPUT_LEARN_BLOCK)
ENET SWI Bridge Management Port Configuration.
(HW_ENET_SWI_MGMT_CONFIG)
ENET SWI Defines several global configuration settings.
(HW_ENET_SWI_MODE_CONFIG)
ENET SWI Define behavior of VLAN input manipulation
function (HW_ENET_SWI_VLAN_IN_MODE)
ENET SWI Define behavior of VLAN output manipulation
function (HW_ENET_SWI_VLAN_OUT_MODE)
ENET SWI Enable the input processing according to the
VLAN_IN_MODE for a port
(HW_ENET_SWI_VLAN_IN_MODE_ENA)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
..._mod(2:0)
110
111
Register name
HW_ENET_SWI memory map
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
Access
ff_rx_data(47:0)
ff_rx_data(55:0)
ff_tx_data(47:0)
ff_tx_data(55:0)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Valid Bytes
Reset value
0001_0121h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
29.9.118/1845
29.9.10/1854
29.9.11/1855
29.9.12/1856
29.9.1/1845
29.9.2/1846
29.9.3/1846
29.9.4/1847
29.9.5/1848
29.9.6/1849
29.9.7/1850
29.9.8/1851
29.9.9/1853
Section/
page
1839
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