MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1897
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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29.9.56 ENET SWI Port 2 Priority resolution configuration
Port 2 Priority resolution configuration. Defines which priority information should be used
for priority resolution
Address:
Freescale Semiconductor, Inc.
Reset
Reset
DEFAULT_
PRIORITY
Bit
Bit
W
W
MAC_EN
RSRVD1
RSRVD0
R
R
Field
Field
31 7
6 4
3
2
31
15
0
0
HW_ENET_SWI_PRIORITY_CFG2
800F_8188h
(HW_ENET_SWI_PRIORITY_CFG2)
30
14
HW_ENET_SWI_PRIORITY_CFG1 field descriptions (continued)
0
0
If set, the VLAN tag field of a frame is inspected and priority is resolved according to the setting programmed
in VLAN_PRIORITYn for the port on which the frame was received.
If cleared, VLAN priority is ignored.
Reserved bits. Write as 0.
The default priority of a frame received on port 2, if none of the priority resolutions could define a priority of
the frame. Up to 3 bits can be implemented.
Reserved bits. Write as 0.
Enable MAC based priority resolution for frame received on port n.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_ENET_SWI_PRIORITY_CFG2 field descriptions
28
12
0
0
RSRVD1[15:7]
27
11
0
0
26
10
0
0
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
800F_8000h base + 188h offset =
25
0
0
9
RSRVD1[31:16]
24
0
0
8
Description
Description
23
0
0
7
DEFAULT_PRIORITY
22
0
0
6
21
0
5
0
20
0
4
0
19
0
0
3
18
0
0
2
17
0
0
1
1897
16
0
0
0
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