MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1994
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 1994 of 2327
- Download datasheet (17Mb)
Programmable Registers
Address:
31.7.26 Programmable Burst Size Register (HW_USBCTRL_BURSTSIZE)
This register is used to control dynamically change the burst size used during data movement
on the initiator (master) interface. This is a read/write register. Writes must be DWORD
writes. The default value is 0x00001010.
Address:
Re-
1994
Reset
Reset
set
Bit
W
R
Bit
Bit
W
W
31
0
R
R
RSVD1
RSVD2
30 24
TTHA
Field
23 0
RSVD1
31
30
0
31
15
0
0
29
0
HW_USBCTRL_TTCTRL 8008_0000h base + 15Ch offset = 8008_015Ch
HW_USBCTRL_BURSTSIZE
28
0
30
14
0
0
Reserved.
These bits are reserved and their value has no effect on operation.
Internal TT Hub Address Representation.
Default is 0 (Read/Write). This field is used to match against the Hub Address field in QH and siTD to
determine if the packet is routed to the internal TT for directly attached FS/LS devices. If the Hub Address
in the QH or siTD does not match this address then the packet will be broadcast on the High Speed ports
destined for a downstream High Speed hub with the address in the QH/siTD.
Reserved.
These bits are reserved and their value has no effect on operation.
27
0
26
0
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
RSVD
24
0
28
12
0
0
HW_USBCTRL_TTCTRL field descriptions
23
0
TTHA
22
0
27
11
0
0
21
0
20
26
10
8008_0000h base + 160h offset = 8008_0160h
0
0
0
19
0
18
25
0
0
0
9
17
0
RSVD2[15:0]
24
16
0
0
0
8
15
0
Description
23
14
0
0
7
0
13
0
TXPBURST
22
0
0
12
6
1
11
0
21
0
5
0
10
0
0
RSVD2[23:16]
9
20
0
4
0
0
8
Freescale Semiconductor, Inc.
0
7
19
0
0
3
0
6
0
5
RXPBURST
18
0
0
2
1
4
3
0
17
0
0
1
0
2
0
1
16
0
0
0
0
0
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