MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 884
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 884 of 2327
- Download datasheet (17Mb)
Programmable Registers
HW_CLKCTRL_HSADC_WR(BF_CLKCTRL_HSADC_CLKGATE(1));
Address:
10.8.23 FLEXCAN Clock Control Register (HW_CLKCTRL_FLEXCAN)
The FLEXCAN control register provides control for Flexcan0 and Flexcan1 clock generation.
EXAMPLE
HW_CLKCTRL_FLEXCAN_WR(BF_CLKCTRL_FLEXCAN_STOP_CAN0(1));
884
Reset
Reset
Bit
Bit
FREQDIV
W
W
RSRVD2
RESETB
RSRVD1
R
R
29 28
Field
27 0
31
30
31
15
0
0
HW_CLKCTRL_HSADC
30
14
0
0
Always set to zero (0).
0: Reset the HSADC Divider. 1: Divider normal work.
This field selects HSADC Divider's divide factor.
00: Divide by 9; 01: Divide by 18; 10: Divide by 36; 11: Divide by 72
Always set to zero (0).
FREQDIV
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
HW_CLKCTRL_HSADC field descriptions
27
11
0
0
8004_0000h base + 150h offset = 8004_0150h
26
10
0
0
25
0
0
9
RSRVD1[15:0]
24
0
0
8
Description
23
0
0
7
RSRVD1[27:16]
22
0
0
6
21
0
5
0
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
17
0
0
1
16
0
0
0
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