USB3300-EZK-TR SMSC, USB3300-EZK-TR Datasheet - Page 35

USB Interface IC USB 2.0 PHY ULPI

USB3300-EZK-TR

Manufacturer Part Number
USB3300-EZK-TR
Description
USB Interface IC USB 2.0 PHY ULPI
Manufacturer
SMSC
Type
Hi Speed USB Host Devicer
Datasheet

Specifications of USB3300-EZK-TR

Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Operating Supply Voltage
3.3 V
Package / Case
QFN-32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface
Datasheet
SMSC USB3300
(ULPI Register Bit)
linestate[0]
linestate[1]
reserved
int
reserved
SUSPENDM
SIGNAL
DATA[7:0]
NXT
CLK
STP
DIR
While in Low Power Mode, the Data interface is redefined so that the Link can monitor Linestate and
the Vbus voltage. In Low Power Mode DATA[3:0] are redefined as shown in
Mapping During Low Power
receivers. The “int” or interrupt signal indicates an unmasked interrupt has occurred. When an
unmasked interrupt or linestate change has occurred, the Link is notified and can determine if it should
wake-up the PHY.
An unmasked interrupt can be caused by the following comparators changing state, VbusVld, SessVld,
SessEnd, and IdGnd. If any of these signals change state during Low Power Mode and either their
rising or falling edge interrupt is enabled, DATA[3] will assert. During Low Power Mode, the VbusVld
and SessEnd comparators can have their interrupts masked to lower the suspend current. Refer to
Section 6.1.9.4, "Minimizing Current in Low Power
While in Low Power Mode, the Data bus is driven asynchronously because all of the PHY clocks are
stopped during Low Power Mode.
DATA[2]
DATA[7:4]
DATA[0]
DATA[1]
DATA[3]
Idle
MAPS TO
T0
Table 6.6 Interface Signal Mapping During Low Power Mode
OUT
OUT
OUT
OUT
OUT
DIRECTION
T1
(reg write)
TXD CMD
Figure 6.8 Entering Low Power Mode
Mode". Linestate[1:0] is the combinational output of the full speed
T2
DATASHEET
Combinatorial linestate[0] driven directly by FS analog receiver.
Combinatorial linestate[1] driven directly by FS analog receiver.
Driven Low
Active high interrupt indication. Must be asserted whenever any
unmasked interrupt occurs.
Driven Low
T3
35
Reg Data[n]
Mode".
T4
Idle
DESCRIPTION
T5
Around
Turn
T6
Table 6.6, "Interface Signal
...
Revision 1.08 (11-07-07)
Low Power Mode
T10

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