AGL030V2-CSG81 Actel, AGL030V2-CSG81 Datasheet - Page 88

• Manufacturer Part Number: AGL030V2-CSG81
• Description: FPGA - Field Programmable Gate Array 30K System Gates IGLOO
• Manufacturer: Actel

Specifications of AGL030V2-CSG81

• Processor Series: AGL030
• Core: IP Core
• Maximum Operating Frequency: 526.32 MHz, 892.86 MHz
• Number Of Programmable I/os: 66
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Gates: 30 K
• Package / Case: CSP-81
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IGLOO DC and Switching Characteristics
Table 2-126 • Minimum and Maximum DC Input and Output Levels
Table 2-127 • Minimum and Maximum DC Input and Output Levels
Table 2-128 • Minimum and Maximum DC Input and Output Levels
2- 74
1.2 V
LVCMOS
Drive
Strength
Notes:
1. I
2. I
3. Currents are measured at 100°C junction temperature and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
1.2 V
LVCMOS
Drive
Strength
2 mA
Notes:
1. I
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
3. Currents are measured at 100°C junction temperature and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
1.2 V
LVCMOS
Drive
Strength
1 mA
Notes:
1. I
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
3. Currents are measured at 100°C junction temperature and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
2 mA
larger when operating outside recommended ranges
larger when operating outside recommended ranges
larger when operating outside recommended ranges
IL
IH
IL
IL
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
Min.
–0.3
Min.
–0.3 0.35 * VCCI 0.65 * VCCI
Min.
1.2 V LVCMOS (JESD8-12A)
Low-Voltage CMOS for 1.2 V complies with the LVCMOS standard JESD8-12A for general purpose 1.2 V
applications. It uses a 1.2 V input buffer and a push-pull output buffer. Furthermore, all LVCMOS 1.2 V
software macros comply with LVCMOS 1.2V wide range as specified in the JESD8-12A
specification.
–0.3
V
Applicable to Advanced I/O Banks
Applicable to Standard Plus I/O Banks
Applicable to Standard I/O Banks
V
V
VIL
0.35 * VCCI 0.65 * VCCI
VIL
0.35 * VCCI 0.65 * VCCI
V
IL
Max.
Max.
Max.
V
V
V
Min.
Min.
Min.
V
V
V
VIH
V
VIH
IH
Max.
Max.
1.26
1.26
Max.
3.6
V
V
V
0.25 * VCCI 0.75 * VCCI
0.25 * VCCI 0.75 * VCCI
0.25 * VCCI 0.75 * VCCI 1
R ev i sio n 1 8
Max.
VOL
Max.
V
Max.
VOL
V
V
OL
V
VOH
Min.
VOH
Min.
V
Min.
V
V
OH
V
mA mA
mA mA
I
mA mA
I
I
OL
OL
OL
2
2
I
I
I
OH
OH
1
OH
2
2
Max.
Max.
Max.
I
mA
TBD
mA
I
mA
TBD
I
TBD
OSH
OSH
OSH
3
3
3
Max.
Max.
mA
TBD
mA
I
I
TBD
Max.
mA
TBD
I
OSL
OSL
OSL
3
3
3
µA
I
µA
µA
I
IL
10 10
I
IL
10 10
IL
10 10
1
1
4
4
1
4
µA
I
µA
µA
I
IH
I
IH
IH
2
4
2
4
2
4