AGL250V5-FGG144 Actel, AGL250V5-FGG144 Datasheet - Page 91
AGL250V5-FGG144
Manufacturer Part Number
AGL250V5-FGG144
Description
FPGA - Field Programmable Gate Array 250K System Gates
Manufacturer
Actel
Datasheet
1.AGL030V2-CSG81.pdf
(236 pages)
Specifications of AGL250V5-FGG144
Processor Series
AGL250
Core
IP Core
Maximum Operating Frequency
892.86 MHz
Number Of Programmable I/os
97
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
250 K
Package / Case
FPBGA-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AGL250V5-FGG144
Manufacturer:
Microsemi SoC
Quantity:
10 000
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Table 2-136 • Minimum and Maximum DC Input and Output Levels for LVCMOS 1.2 V Wide Range
Table 2-137 • Minimum and Maximum DC Input and Output Levels for LVCMOS 1.2 V Wide Range
1.2 V LVCMOS
Wide Range
Drive
Strength
100 µA
Notes:
1. Note that 1.2 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will not operate at the
2. I
3. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
4. Currents are measured at 100°C junction temperature and maximum voltage.
5. Currents are measured at 85°C junction temperature.
6. Software default selection highlighted in gray.
1.2 V LVCMOS Wide
Range
Drive
Strength
100 µA
Notes:
1. Note that 1.2 V LVCMOS wide range is applicable to 100
2. I
3. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
4. Currents are measured at 100°C junction temperature and maximum voltage.
5. Currents are measured at 85°C junction temperature.
6. Software default selection highlighted in gray.
equivalent software default drive strength. These values are for normal ranges only.
larger when operating outside recommended ranges.
equivalent software default drive strength. These values are for normal ranges only.
larger when operating outside recommended ranges
IL
IL
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
Equivalent
Equivalent
Software
Strength
Software
Strength
Option
Option
Default
Default
Drive
2 mA
Drive
1.2 V LCMOS Wide Range
2mA
Applicable to Advanced I/O Banks
Applicable to Standard Plus I/O Banks
1
1
Min.
–0.3 0.35 * VCCI 0.65 * VCCI 1.26 0.25 * VCCI 0.75 * VCCI 100 100 TBD TBD
Min.
–0.3 0.35 * VCCI 0.65 * VCCI 1.26 0.25 * VCCI 0.75 * VCCI 100 100 TBD TBD 10 10
V
V
VIL
VIL
Max.
Max.
V
V
Min.
Min.
V
V
VIH
VIH
Max.
Max.
V
V
R ev i si o n 1 8
μ
A drive strength only. The configuration will not operate at the
Max.
Max.
VOL
V
V
V
OL
VOH
Min.
VOH
Min.
V
V
mA mA
I
OL
mA mA
I
OL
IGLOO Low Power Flash FPGAs
I
OH
I
OH
Max.
mA
I
OSL
Max.
mA
I
OSL
4
4
Max.
mA
I
OSH
Max.
mA
I
OSH
4
4
µA
I
µA
IL
10
I
IL
2
5
2
5
µA
I
µA
I
2- 77
IH
10
IH
3
5
3
5
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