LFXP2-8E-5FTN256I Lattice, LFXP2-8E-5FTN256I Datasheet - Page 332
LFXP2-8E-5FTN256I
Manufacturer Part Number
LFXP2-8E-5FTN256I
Description
FPGA - Field Programmable Gate Array 8K LUTs 201 I/O Inst on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet
1.LFXP2-8E-5FTN256I.pdf
(341 pages)
Specifications of LFXP2-8E-5FTN256I
Number Of Macrocells
8000
Number Of Programmable I/os
201
Data Ram Size
226304
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FTBGA-256
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
226304
Number Of I /o
201
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Package
256FTBGA
Family Name
LatticeXP2
Device Logic Units
8000
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
201
Ram Bits
226304
Re-programmability Support
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP2-8E-5FTN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Table 17-5. Procedure for Program a JEDEC File into the LatticeXP2 using ispVM (Continued)
Reference Material
LatticeXP2 Bitstream File Format
Table 17-6 shows the format of a LatticeXP2 bitstream. The bitstream consists of a comment field, a header, the
preamble, and the configuration setup, and data.
Note: The data in this table is intended for reference only.
Implement SPI Flash Programming on ispVM System
The LatticeECP2/3 and LatticeXP2 families of FPGA devices are designed to support a JTAG instruction,
PROGRAM_SPI, which when executed, will effectively connect the four SPI interface signals of SPI Flash devices
to four JTAG port signals.
Steps
4
5
6
7
Table 17-6. LatticeXP2 Bitstream File Forma
Comments
Header
Verify ID
Control Register 0
Reset Address
Write Increment
Data 0
Data 1
Data n-1
End
Usercode
SED CRC
Program Security
Program Done
NOOP
End
Browse for the JEDEC file.
Click OK to close the device selection menu.
Click GO to program the LatticeXP2 embedded Flash. For embedded programming, skip this step. Go to
step 7 to generate the VME file instead.
This is optional. For embedded programming, use the VME file generator to generate the VME file first then
run the VME file to program the LatticeXP2 embedded Flash device then port the ispVME driver onto the
embedded system.
Frame
. . .
1011110110110011
(Comment String)
1111...1111
1111...1111
1111...1111
1111...1111
Contents
. . .
Description
ASCII Comment (Argument) String and Terminator
16 Dummy bits
16-bit Standard Bitstream Preamble (0xBDB3)
64 bits of command and data
64 bits of command and data
32 bits of command and data
32 bits of command and data
Data, 16-bit CRC, and Stop bits
Data, 16-bit CRC, and Stop bits
. . .
Data, 16-bit CRC, and Stop bits
Terminator bits and 16-bit CRC
64 bits of command and data
64 bits of command and data
32 bits of command and data
32 bits of command and data, 16-bit CRC
64 bits of NOOP data
32-bit Terminator (all ones)
17-14
Description
LatticeXP2 Dual Boot Feature
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