LFXP2-8E-5TN144I Lattice, LFXP2-8E-5TN144I Datasheet - Page 29
LFXP2-8E-5TN144I
Manufacturer Part Number
LFXP2-8E-5TN144I
Description
FPGA - Field Programmable Gate Array 8K LUTs 100 I/O Inst on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet
1.LFXP2-8E-5FTN256I.pdf
(341 pages)
Specifications of LFXP2-8E-5TN144I
Number Of Macrocells
8000
Number Of Programmable I/os
100
Data Ram Size
226304
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
TQFP-144
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
226304
Number Of I /o
100
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP2-8E-5TN144I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
Figure 2-14. Slice0 through Slice2 Control Selection
Edge Clock Routing
LatticeXP2 devices have eight high-speed edge clocks that are intended for use with the PIOs in the implementa-
tion of high-speed interfaces. Each device has two edge clocks per edge. Figure 2-15 shows the selection muxes
for these clocks.
Figure 2-15. Edge Clock Mux Connections
Secondary Clock
GPLL Output CLKOP
GPLL Output CLKOS
Clock Input Pad
GPLL Input Pad
GPLL Input Pad
Routing
Vcc
Input Pad
Input Pad
Routing
Routing
Routing
12
3
1
2-15
16:1
Top and Bottom
ECLK1/ ECLK2
Left and Right
Left and Right
(Both Muxes)
Edge Clocks
Edge Clocks
Edge Clocks
ECLK1
ECLK2
Slice Control
LatticeXP2 Family Data Sheet
Architecture
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