A3P1000L-PQG208 Actel, A3P1000L-PQG208 Datasheet - Page 52

• Manufacturer Part Number: A3P1000L-PQG208
• Description: FPGA - Field Programmable Gate Array 1M SYSTEM GATES
• Manufacturer: Actel

Specifications of A3P1000L-PQG208

• Processor Series: A3P1000
• Core: IP Core
• Maximum Operating Frequency: 781.25 MHz
• Number Of Programmable I/os: 154
• Data Ram Size: 147456
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Gates: 1 M
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ProASIC3L DC and Switching Characteristics
Table 2-43 • Duration of Short Circuit Event before Failure
Table 2-44 • I/O Input Rise Time, Fall Time, and Related I/O Reliability
2- 38
Temperature
–40°C
0°C
25°C
70°C
85°C
100°C
110°C
Input Buffer
LVTTL/LVCMOS
LVDS/B-LVDS/
M-LVDS/LVPECL
*
The maximum input rise/fall time is related to the noise induced into the input buffer trace. If the noise is low, then the
rise time and fall time of input buffers can be increased beyond the maximum value. The longer the rise/fall times, the
more susceptible the input signal is to the board noise. Actel recommends signal integrity evaluation/characterization
of the system to ensure that there is no excessive noise coupling into input signals.
Input Rise/Fall Time (min.)
No requirement
No requirement
R e visio n 9
Input Rise/Fall Time (max.)
Time before Failure
10 ns *
10 ns *
> 20 years
> 20 years
> 20 years
6 months
3 months
5 years
2 years
20 years (110°C)
10 years (100°C)
Reliability