A3P1000L-PQG208 Actel, A3P1000L-PQG208 Datasheet - Page 87

• Manufacturer Part Number: A3P1000L-PQG208
• Description: FPGA - Field Programmable Gate Array 1M SYSTEM GATES
• Manufacturer: Actel

Specifications of A3P1000L-PQG208

• Processor Series: A3P1000
• Core: IP Core
• Maximum Operating Frequency: 781.25 MHz
• Number Of Programmable I/os: 154
• Data Ram Size: 147456
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Gates: 1 M
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-114 • 1.2 V LVCMOS Low Slew
Table 2-115 • 1.2 V LVCMOS High Slew
Table 2-116 • 1.2 V LVCMOS High Slew
Table 2-117 • 1.2 V LVCMOS High Slew
Table 2-118 • 1.2 V LVCMOS High Slew
Drive
Strength
2 mA
Note:
Drive
Strength
2 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
Drive Strength Speed Grade t
2 mA
Note:
Drive Strength Speed Grade t
2 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
Drive Strength Speed Grade t
2 mA
Note:
For specific junction temperature and voltage supply levels, refer to
For specific junction temperature and voltage supply levels, refer to
For specific junction temperature and voltage supply levels, refer to
Timing Characteristics
Speed
Grade
Speed
Grade
Commercial-Case Conditions: T
Applicable to Pro I/O Banks
Commercial-Case Conditions: T
Applicable to Pro I/O Banks
Commercial-Case Conditions: T
Applicable to Advanced I/O Banks
Commercial-Case Conditions: T
Applicable to Advanced I/O Banks
Commercial-Case Conditions: T
Applicable to Standard Plus I/O Banks
Std.
Std.
–1
–1
1.2 V DC Core Voltage
Std.
Std.
Std.
t
t
–1
–1
–1
DOUT
0.77
0.66
DOUT
0.77
0.66
10.04 0.04 2.02
11.80 0.05 2.38
4.84
4.12
t
t
DP
DP
DOUT
0.70
0.60
DOUT
0.70
0.60
DOUT
0.70
0.60
0.05 2.38
0.04 2.02
t
t
DIN
DIN
8.77 0.05 1.82 0.50
7.46 0.04 1.55 0.43
3.73 0.05 1.82 0.50
3.17 0.04 1.55 0.43
9.67 0.05 1.83 0.50
8.23 0.04 1.56 0.43
t
t
t
DP
DP
DP
t
t
PY
PY
J
J
J
J
J
t
t
t
DIN
DIN
DIN
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.4 V
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.4 V
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
3.52
2.99
3.52
2.99
t
t
PYS
PYS
t
t
t
PY
PY
PY
R e v i s i o n 9
t
t
0.50
0.43
0.50
0.43
EOUT
EOUT
t
t
t
EOUT
EOUT
EOUT
10.97
Table 2-6 on page 2-7
Table 2-6 on page 2-7
9.33
4.50
3.83
t
t
6.17
5.25
2.48
2.11
6.78
5.77
ZL
ZL
t
t
t
ZL
ZL
ZL
Table 2-6 on page 2-7
Table 2-6 on page 2-7
Table 2-6 on page 2-7
8.61 4.79 4.38 12.91
7.32 4.08 3.72 10.98
3.96 4.78 4.51
3.37 4.06 3.84
t
t
5.45 2.80 2.77
4.63 2.39 2.35 6.90
2.06 2.80 2.89 4.42
1.76 2.38 2.46 3.76
5.99 4.08 4.57 8.72
5.09 3.47 3.88 7.42
ZH
ZH
t
t
t
ZH
ZH
ZH
t
t
LZ
LZ
t
t
t
ProASIC3L Low Power Flash FPGAs
LZ
LZ
LZ
for derating values.
for derating values.
t
t
t
t
t
HZ
HZ
HZ
HZ
HZ
6.44
5.48
t
8.11
t
t
t
t
for derating values.
for derating values.
for derating values.
ZLS
ZLS
ZLS
ZLS
ZLS
t
7.39
6.28
t
4.00
3.41
t
7.93
6.74
10.55
t
8.97
t
5.90
5.02
ZHS
ZHS
ZHS
ZHS
ZHS
Units
Units
Units
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
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