MMA8452QR1 Freescale Semiconductor, MMA8452QR1 Datasheet - Page 26

• Manufacturer Part Number: MMA8452QR1
• Description: Board Mount Accelerometers LOW G 3-AXIS 12BT EX VLT
• Manufacturer: Freescale Semiconductor

Specifications of MMA8452QR1

• Sensing Axis: X, Y, Z
• Acceleration: 2 g, 4 g, 8 g
• Digital Output - Number Of Bits: 8 bit, 12 bit
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.95 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Digital Output - Bus Interface: I2C
• Shutdown: Yes
• Sensitivity: 256 count/g, 512 count/g, 1024 count/g
• Package / Case: QFN-16
• Output Type: Digital
• Rohs Compliant: Yes
• Peak Reflow Compatible (260 C): Yes
• Acceleration Range: ± 2g, ± 4g, ± 8g
• No. Of Axes: 3
• Ic Interface Type: I2C
• Sensor Case Style: QFN
• No. Of Pins: 16
• Supply Voltage Range: 1.95V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0x0D: WHO_AM_I Device ID Register
factory for custom alternate values.
0x0E: XYZ_DATA_CFG Register
bit is set. The data registers 0x01 - 0x06 will contain high pass filtered data when this bit is set.
Table 15. XYZ Data Configuration Descriptions
0x0F: HP_FILTER_CUTOFF High Pass Filter Register
output of this filter is indicated by the data registers (0x01-0x06) when bit 4 (HPF_OUT) of Register 0x0E is set. The filter cut-off
options change based on the data rate selected as shown in
to Freescale application note AN4071.
Table 17. High Pass Filter Cut-off Register Descriptions
0x0D: WHO_AM_I Device ID Register (Read Only)
0x0E: XYZ_DATA_CFG (Read/Write)
0x0F HP_FILTER_CUTOFF: High Pass Filter Register (Read/Write)
26
MMA8452Q
The device identification register identifies the part. The default value is 0x2A. This value is factory programmed. Consult the
The XYZ_DATA_CFG register sets the dynamic range and sets the high pass filter for the output data. When the HPF_OUT
The default full scale value range is 2g and the high pass filter is disabled.
This register sets the high-pass filter cut-off frequency for removal of the offset and slower changing acceleration data. The
HPF_OUT
Bit 7
Bit 7
FS[1:0]
Bit 7
0
0
0
Pulse_HPF_BYP
Pulse_LPF_EN
SEL[1:0]
Enable High pass output data 1 = output data high pass filtered. Default value: 0
Output buffer data format full scale. Default value: 00 (2g).
Bit 6
Bit 6
Bit 6
0
0
0
Bypass High Pass Filter for Pulse Processing Function.
0: HPF enabled for Pulse Processing, 1: HPF Bypassed for Pulse Processing
Default value: 0.
Enable Low Pass Filter for Pulse Processing Function.
0: LPF disabled for Pulse Processing, 1: LPF Enabled for Pulse Processing
Default value: 0.
HPF Cut-off frequency selection.
Default value: 00 (see
Pulse_HPF_BYP Pulse_LPF_EN
Bit 5
Bit 5
1
0
Bit 5
Table 16. Full Scale Range
FS1
0
0
1
1
HPF_OUT
Bit 4
Bit 4
0
Table
Bit 4
FS0
0
1
0
1
18).
Table
Bit 3
Bit 3
18. For details of implementation on the high pass filter, refer
1
0
Full Scale Range
Bit 3
0
Reserved
2
4
8
Bit 2
Bit 2
0
0
Bit 2
0
Bit 1
Bit 1
FS1
1
SEL1
Bit 1
Freescale Semiconductor
Bit 0
Bit 0
FS0
SEL0
Bit 0
0
Sensors