PIC18F45K80-I/PT Microchip Technology, PIC18F45K80-I/PT Datasheet - Page 115

• Manufacturer Part Number: PIC18F45K80-I/PT
• Description: MCU PIC 32KB FLASH 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45K80-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F45K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3.4
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM. SFRs start at the top of
data memory (FFFh) and extend downward to occupy
all of Bank 15 (F00h to FFFh) and the top part of
Bank 14 (EF4h to EFFh).
A list of these registers is given in
Table
TABLE 6-1:
 2011 Microchip Technology Inc.
Note
Addr.
FFDh
FFCh
FEEh
FEDh
FECh
FEBh
FEAh
FFEh
FFBh
FEFh
FFFh
FFAh
FF9h
FF8h
FF7h
FF6h
FF5h
FF4h
FF3h
FF2h
FF1h
FF0h
FE9h
FE8h
FE7h
FE6h
FE5h
FE4h
FE3h
FE2h
FE1h
FE0h
6-2.
1:
2:
3:
4:
5:
POSTDEC0
POSTDEC1
POSTINC0
POSTINC1
PREINC0
PREINC1
PLUSW0
PLUSW1
TBLPTRU
TBLPTRH
TBLPTRL
INTCON2
INTCON3
STKPTR
PCLATU
PCLATH
INTCON
INDF0
INDF1
TABLAT
PRODH
PRODL
FSR0H
FSR1H
Name
FSR0L
WREG
FSR1L
TOSU
TOSH
TOSL
This is not a physical register.
Unimplemented registers are read as ‘0’.
This register is only available on devices with 64 pins.
This register is not available on devices with 28-pins.
Addresses, E41h through F5Fh, are also used by the SFRs, but are not part of the Access RAM. To access these registers, users must
always load the proper BSR value.
BSR
PCL
SPECIAL FUNCTION REGISTERS
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
SPECIAL FUNCTION REGISTER MAP FOR PIC18F66K80 FAMILY
Addr.
FDDh
FDCh
FCDh
FCCh
FDFh
FDEh
FDBh
FDAh
FCFh
FCEh
FCBh
FCAh
FD9h
FD8h
FD7h
FD6h
FD5h
FD4h
FD3h
FD2h
FD1h
FD0h
FC9h
FC8h
FC8h
FC7h
FC6h
FC5h
FC4h
FC3h
FC2h
FC1h
FC0h
POSTDEC2
POSTINC2
PREINC2
PLUSW2
OSCCON2
SSPCON1
SSPCON2
OSCCON
WDTCON
SSPSTAT
SSPADD
SSPMSK
ADRESH
ADCON0
ADCON1
ADCON2
INDF2
SSPBUF
ADRESL
STATUS
TMR0H
T0CON
TMR1H
T1CON
T2CON
FSR2H
TMR0L
TMR1L
Name
FSR2L
RCON
TMR2
—
PR2
(2)
(1)
(1)
(1)
(1)
(1)
Table 6-1
Addr.
FBEh
FBDh
FBCh
FBBh
FBAh
FBFh
FAEh
FADh
FACh
FABh
FAAh
FB9h
FB8h
FB7h
FB6h
FB5h
FB4h
FB3h
FB2h
FB1h
FB0h
FAFh
FA9h
FA8h
FA7h
FA6h
FA4h
FA2h
FA1h
FA5h
FA3h
FA0h
BAUDCON2
BAUDCON1
ECCP1DEL
CCP1CON
ECCP1AS
HLVDCON
and
CVRCON
T3GCON
RCREG1
T1GCON
Preliminary
CCPR1H
SPBRG1
TXREG1
CCPR1L
CMSTAT
RCSTA1
RCSTA2
TXSTA2
TXSTA1
TMR3H
TMR3L
T3CON
Name
IPR4
PIR4
PIR3
IPR2
PIR2
PIE4
IPR3
PIE3
PIE2
PR4
PIC18F66K80 FAMILY
Addr.
The SFRs can be classified into two sets: those
associated with the “core” device functionality (ALU,
Resets and interrupts) and those related to the
peripheral functions. The Reset and Interrupt registers
are described in their respective chapters, while the
ALU’s STATUS register is described later in this section.
Registers related to the operation of the peripheral
features are described in the chapter for that peripheral.
The SFRs are typically distributed among the
peripherals whose functions they control. Unused SFR
locations are unimplemented and read as ‘ 0 ’s.
F9Dh
F9Ch
F8Dh
F8Ch
F9Eh
F9Bh
F9Ah
F8Eh
F8Bh
F8Ah
F9Fh
F99h
F98h
F97h
F96h
F95h
F94h
F93h
F92h
F91h
F90h
F8Fh
F89h
F88h
F87h
F86h
F85h
F84h
F83h
F82h
F81h
F80h
PSTR1CON
OSCTUNE
REFOCON
CCPTMRS
PORTG
PORTD
PORTF
TRISG
SLRCON
TRISF
TRISE
TRISD
ODCON
LATG
PORTC
LATF
LATE
LATD
T4CON
PORTE
PORTB
PORTA
Name
TRISC
TRISB
TRISA
TMR4
LATC
LATB
LATA
IPR1
PIR1
PIE1
(3)
(4)
(4)
(3)
(3)
(4)
(4)
(3)
(3)
(3)
(4)
Addr.
F7Eh
F7Dh SPBRGH1
F7Ch SPBRGH2
F7Bh
F7Ah
F6Eh
F6Dh
F6Ch
F6Bh
F6Ah
F7Fh
F6Fh
F79h
F78h
F77h
F76h
F75h
F74h
F73h
F72h ECANCON
F71h COMSTAT
F70h
F69h
F68h
F67h
F66h
F65h
F64h RXB0EIDL
F63h RXB0EIDH
F62h RXB0SIDL
F61h RXB0SIDH
F60h RXB0CON
RXB0DLC
CANSTAT
CANCON
EECON1
EECON2
SPBRG2
RCREG2
EEADRH
TXREG2
CIOCON
RXB0D7
RXB0D6
RXB0D5
RXB0D4
RXB0D3
RXB0D2
RXB0D1
RXB0D0
EEDATA
EEADR
Name
IPR5
PIR5
PIE5
DS39977C-page 115
Addr.
F4E
F4D
F4C
F4B
F4A
F4F
F53
F52
F51
F50
F49
F48
F47
F46
F45
F44
F43
F42
F41
F40
F5Eh CM2CON
F5Dh
F5Ch
F5Bh
F5Ah
F5Fh CM1CON
F59h
F58h
F57h
F56h PADCFG1
F55h CTMUCONH
F54h CTMUCONL
h CTMUICONH
h
h
h CCP2CON
h CCPR3H
h CCPR3L
h CCP3CON
h
h
h CCP4CON
h
h
h CCP5CON
h PSPCON
h MDCON
h MDSRC
h MDCARH
h MDCARL
h
h
ANCON0
ANCON1
CCPR2H
CCPR4H
CCPR5H
CCPR2L
CCPR4L
CCPR5L
WPUB
PMD0
PMD1
PMD2
IOCB
Name
—
—
(2)
(2)
(5)
(5)
(5)
(5)
(5)
(3,5)
(3,5)
(4,5)
(4,5)
(4,5)
(3,5)
(3,5)
(5)
(5)
(5)
(5)
(5)
(5)
(4,5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)