PIC18F45K80-I/PT Microchip Technology, PIC18F45K80-I/PT Datasheet - Page 178

• Manufacturer Part Number: PIC18F45K80-I/PT
• Description: MCU PIC 32KB FLASH 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45K80-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F45K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F66K80 FAMILY
REGISTER 11-1:
REGISTER 11-2:
DS39977C-page 178
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-1
bit 0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
RDPU
WPUB7
R/W-0
R/W-1
2:
(1)
Unimplemented on 28-pin devices.
Unimplemented on 40-pin devices.
RDPU: PORTD Pull-up Enable bit
1 = PORTD pull-up resistors are enabled by individual port latch values
0 = All PORTD pull-up resistors are disabled
REPU: PORTE Pull-up Enable bit
1 = PORTE pull-up resistors are enabled by individual port latch values
0 = All PORTE pull-up resistors are disabled
RFPU: PORTF Pull-up Enable bit
1 = PORTF pull-up resistors are enabled by individual port latch values
0 = All PORTF pull-up resistors are disabled
RGPU: PORTG Pull-up Enable bit
1 = PORTG pull-up resistors are enabled by individual port latch values
0 = All PORTG pull-up resistors are disabled
Unimplemented: Read as ‘ 0 ’
CTMUDS: CTMU Comparator Data Select bit
1 = External comparator (with output on pin CTDIN) is used for CTMU compares
0 = Internal comparator (CMP2) is used for CTMU compares
WPUB<7:0>: Weak Pull-Up Enable Register bits
1 = Pull-up enabled on corresponding PORTB pin when RBPU = 0 and the pin is an input
0 = Pull-up disabled on corresponding PORTB pin
REPU
WPUB6
R/W-0
R/W-1
PADCFG1: PAD CONFIGURATION REGISTER
WPUB: WEAK PULL-UP PORTB ENABLE REGISTER
(1)
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
RFPU
WPUB5
R/W-0
R/W-1
(2)
RGPU
WPUB4
R/W-0
R/W-1
(2)
(1)
(1)
Preliminary
(2)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WPUB3
R/W-1
U-0
—
WPUB2
R/W-1
U-0
—
 2011 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
WPUB1
R/W-1
U-0
—
CTMUDS
WPUB0
R/W-0
R/W-1
bit 0
bit 0