PIC18F45K80-I/PT Microchip Technology, PIC18F45K80-I/PT Datasheet - Page 192

• Manufacturer Part Number: PIC18F45K80-I/PT
• Description: MCU PIC 32KB FLASH 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45K80-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F45K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F66K80 FAMILY
TABLE 11-7:
TABLE 11-8:
DS39977C-page 192
RD7/RX2/DT2/
P1D/PSP7
Legend:
Note 1:
PORTD
LATD
TRISD
PADCFG1
ODCON
ANCON1
Legend: Shaded cells are not used by PORTD.
Note 1:
Pin Name
Name
2:
O = Output, I = Input, ANA = Analog Signal, DIG = CMOS Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
Pin assignment for 40 and 44-pin devices (PIC18F4XK80).
Unimplemented on 28-pin devices, read as ‘ 0 ’.
Unimplemented on 28/40/44-pin devices, read as ‘ 0 ’.
RDPU
TRISD7
SSPOD
LATD7
Bit 7
RD7
PORTD FUNCTIONS (CONTINUED)
Function
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
—
RX2
DT2
PSP7
RD7
P1D
(1)
(1)
(1)
ANSEL14
CCP5OD
REPU
TRISD6
LATD6
Bit 6
RD6
Setting
TRIS
0
1
1
1
1
0
x
(1)
ANSEL13
CCP4OD
I/O
I/O
RFPU
TRISD5
O
O
O
LATD5
I
I
I
Bit 5
RD5
I/O Type
(2)
DIG
DIG
DIG
ST
ST
ST
ST
Preliminary
ANSEL12
CCP3OD
RGPU
TRISD4
LATD4
LATD<7> data output.
PORTD<7> data input.
Asynchronous serial receive data input (EUSART module).
Synchronous serial data output (EUSART module); takes priority over
port data.
Synchronous serial data input (EUSART module); user must configure
as an input.
ECCP1 Enhanced PWM output, Channel D. May be configured for
tri-state during Enhanced PWM.
Parallel Slave Port data.
Bit 4
RD4
(2)
ANSEL11
CCP2OD
TRISD3
LATD3
Bit 3
RD3
—
ANSEL10
CCP1OD
TRISD2
LATD2
Description
Bit 2
RD2
—
 2011 Microchip Technology Inc.
ANSEL9
TRISD1
LATD1
U2OD
Bit 1
RD1
—
CTMUDS
ANSEL8
TRISD0
LATD0
U1OD
Bit 0
RD0