PIC18F45K80-I/PT Microchip Technology, PIC18F45K80-I/PT Datasheet - Page 203

• Manufacturer Part Number: PIC18F45K80-I/PT
• Description: MCU PIC 32KB FLASH 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45K80-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F45K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.1
The DSM module can be enabled by setting the MDEN
bit in the MDCON register. Clearing the MDEN bit in the
MDCON register, disables the DSM module by auto-
matically switching the carrier high and carrier low
signals to the V
source is also switched to the MDBIT in the MDCON
register. This not only assures that the DSM module is
inactive, but that it is also consuming the least amount
of current.
The values used to select the carrier high, carrier low
and modulator sources held by the Modulation Source,
Modulation High Carrier and Modulation Low Carrier
Control registers are not affected when the MDEN bit is
cleared, and the DSM module is disabled. The values
inside these registers remain unchanged while the
DSM is inactive. The sources for the carrier high,
carrier low and modulator signals will once again be
selected when the MDEN bit is set and the DSM
module is again enabled and active.
The modulated output signal can be disabled without
shutting down the DSM module. The DSM module will
remain active and continue to mix signals, but the out-
put value will not be sent to the MDOUT pin. During the
time that the output is disabled, the MDOUT pin will
remain low. The modulated output can be disabled by
clearing the MDOE bit in the MDCON register.
12.2
The modulator signal can be supplied from the following
sources:
• ECCP1 Signal
• CCP2 Signal
• CCP3 Signal
• CCP4 Signal
• CCP5 Signal
• MSSP SDO Signal (SPI mode only)
• EUSART1 TX1 Signal
• EUSART2 TX2 Signal
• External Signal on MDMIN Pin (RF0/MDMIN)
• MDBIT bit in the MDCON Register
The modulator signal is selected by configuring the
MDSRC<3:0> bits in the MDSRC register.
 2011 Microchip Technology Inc.
DSM Operation
Modulator Signal Sources
SS
signal source. The modulator signal
Preliminary
PIC18F66K80 FAMILY
12.3
The carrier high signal and carrier low signal can be
supplied from the following sources:
• CCP1 Signal
• CCP2 Signal
• CCP3 Signal
• CCP4 Signal
• Reference Clock Module Signal
• External Signal on MDCIN1 Pin (RF2/MDCIN1)
• External Signal on MDCIN2 Pin (RF4/MDCIN2)
• V
The carrier high signal is selected by configuring the
MDCH<3:0> bits in the MDCARH register. The carrier
low signal is selected by configuring the MDCL<3:0>
bits in the MDCARL register.
12.4
During the time when the DSM switches between car-
rier high and carrier low signal sources, the carrier data
in the modulated output signal can become truncated.
To prevent this, the carrier signal can be synchronized
to the modulator signal. When synchronization is
enabled, the carrier pulse that is being mixed at the
time of the transition is allowed to transition low before
the DSM switches over to the next carrier source.
Synchronization is enabled separately for the carrier
high and carrier low signal sources. Synchronization for
the carrier high signal can be enabled by setting the
MDCHSYNC bit in the MDCARH register. Synchroniza-
tion for the carrier low signal can be enabled by setting
the MDCLSYNC bit in the MDCARL register.
Figure 12-1
of using various synchronization methods.
SS
Carrier Signal Sources
Carrier Synchronization
through
Figure 12-5
show timing diagrams
DS39977C-page 203