PIC18F45K80-I/PT Microchip Technology, PIC18F45K80-I/PT Datasheet - Page 378

MCU PIC 32KB FLASH 44TQFP

PIC18F45K80-I/PT

Manufacturer Part Number
PIC18F45K80-I/PT
Description
MCU PIC 32KB FLASH 44TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F45K80-I/PT

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Number Of I /o
35
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP
Controller Family/series
PIC18
Ram Memory Size
4KB
Cpu Speed
16MIPS
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, USART
Processor Series
PIC18F45K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PIC18F66K80 FAMILY
REGISTER 24-1:
DS39977C-page 378
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4-3
bit 2
bit 1-0
Note 1:
R/W-0
CON
2:
The CMPxIF is automatically set any time this mode is selected and must be cleared by the application
after the initial configuration.
Comparator 1 uses C2INB as an input to the inverting terminal. Comparator 2 uses C1INB as an input to
the inverted terminal.
CON: Comparator Enable bit
1 = Comparator is enabled
0 = Comparator is disabled
COE: Comparator Output Enable bit
1 = Comparator output is present on the CxOUT pin
0 = Comparator output is internal only
CPOL: Comparator Output Polarity Select bit
1 = Comparator output is inverted
0 = Comparator output is not inverted
EVPOL<1:0>: Interrupt Polarity Select bits
11 = Interrupt generation on any change of the output
10 = Interrupt generation only on high-to-low transition of the output
01 = Interrupt generation only on low-to-high transition of the output
00 = Interrupt generation is disabled
CREF: Comparator Reference Select bit (non-inverting input)
1 = Non-inverting input connects to internal CV
0 = Non-inverting input connects to CxINA pin
CCH<1:0>: Comparator Channel Select bits
11 = Inverting input of comparator connects to V
10 = Inverting input of comparator connects to C2INB pin
01 = Inverting input of comparator connects to CxINC pin
00 = Inverting input of comparator connects to C1INB pin
R/W-0
COE
CMxCON: COMPARATOR CONTROL x REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
CPOL
EVPOL1
R/W-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EVPOL0
REF
R/W-1
BG
voltage
(1)
(2)
(2)
R/W-1
CREF
 2011 Microchip Technology Inc.
x = Bit is unknown
R/W-1
CCH1
R/W-1
CCH0
bit 0

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