PIC18F45K80-I/PT Microchip Technology, PIC18F45K80-I/PT Datasheet - Page 394

• Manufacturer Part Number: PIC18F45K80-I/PT
• Description: MCU PIC 32KB FLASH 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45K80-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F45K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F66K80 FAMILY
26.6
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
TABLE 26-1:
DS39977C-page 394
HLVDCON
INTCON
PIR2
PIE2
IPR2
TRISA
Legend: — = unimplemented, read as ‘ 0 ’. Shaded cells are not used by the HLVD module.
Note 1:
Name
Operation During Sleep
PORTA<7:6> and their direction bits are individually configured as port pins based on various primary
oscillator modes. When disabled, these bits read as ‘ 0 ’.
VDIRMAG
GIE/GIEH
TRISA7
OSCFIE
OSCFIP
OSCFIF
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
Bit 7
(1)
PEIE/GIEL
TRISA6
BGVST
Bit 6
—
—
—
(1)
TMR0IE
TRISA5
IRVST
Bit 5
—
—
—
Preliminary
HLVDEN
INT0IE
Bit 4
—
—
—
—
26.7
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
HLVDL3
TRISA3
BCLIF
BCLIE
BCLIP
RBIE
Bit 3
Effects of a Reset
HLVDL2
TMR0IF
HLVDIF
HLVDIE
HLVDIP
TRISA2
Bit 2
 2011 Microchip Technology Inc.
HLVDL1
TMR3IE
TMR3IP
TMR3IF
TRISA1
INT0IF
Bit 1
TMR3GIE
TMR3GIP
TMR3GIF
HLVDL0
TRISA0
RBIF
Bit 0