PIC18F45K80-I/PT Microchip Technology, PIC18F45K80-I/PT Datasheet - Page 443

• Manufacturer Part Number: PIC18F45K80-I/PT
• Description: MCU PIC 32KB FLASH 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45K80-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F45K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27.3.4
Listen Only mode provides a means for the
PIC18F66K80 family devices to receive all messages,
including messages with errors. This mode can be
used for bus monitor applications or for detecting the
baud rate in ‘hot plugging’ situations. For auto-baud
detection, it is necessary that there are at least two
other nodes which are communicating with each other.
The baud rate can be detected empirically by testing
different values until valid messages are received. The
Listen Only mode is a silent mode, meaning no mes-
sages will be transmitted while in this state, including
error flags or Acknowledge signals. The filters and
masks can be used to allow only particular messages
to be loaded into the receive registers or the filter
masks can be set to all zeros to allow a message with
any identifier to pass. The error counters are reset and
deactivated in this state. The Listen Only mode is acti-
vated by setting the mode request bits in the CANCON
register.
27.3.5
This mode will allow internal transmission of messages
from the transmit buffers to the receive buffers without
actually transmitting messages on the CAN bus. This
mode can be used in system development and testing.
In this mode, the ACK bit is ignored and the device will
allow incoming messages from itself, just as if they
were coming from another node. The Loopback mode
is a silent mode, meaning no messages will be trans-
mitted while in this state, including error flags or
Acknowledge signals. The TXCAN pin will revert to port
I/O while the device is in this mode. The filters and
masks can be used to allow only particular messages
to be loaded into the receive registers. The masks can
be set to all zeros to provide a mode that accepts all
messages. The Loopback mode is activated by setting
the mode request bits in the CANCON register.
27.3.6
The module can be set to ignore all errors and receive
any message. In functional Mode 0, the Error Recogni-
tion mode is activated by setting the RXM<1:0> bits in
the RXBnCON registers to ‘ 11 ’. In this mode, the data
which is in the message assembly buffer until the error
time, is copied in the receive buffer and can be read via
the CPU interface.
 2011 Microchip Technology Inc.
LISTEN ONLY MODE
LOOPBACK MODE
ERROR RECOGNITION MODE
Preliminary
PIC18F66K80 FAMILY
27.4
In addition to CAN modes of operation, the ECAN mod-
ule offers a total of 3 functional modes. Each of these
modes are identified as Mode 0, Mode 1 and Mode 2.
27.4.1
Mode 0 is designed to be fully compatible with CAN
modules used in PIC18CXX8 and PIC18FXX8 devices.
This is the default mode of operation on all Reset con-
ditions. As a result, module code written for the
PIC18XX8 CAN module may be used on the ECAN
module without any code changes.
The following is the list of resources available in Mode 0:
• Three transmit buffers: TXB0, TXB1 and TXB2
• Two receive buffers: RXB0 and RXB1
• Two acceptance masks, one for each receive
• Six acceptance filters, 2 for RXB0 and 4 for RXB1:
27.4.2
Mode 1 is similar to Mode 0, with the exception
that more resources are available in Mode 1. There are
16 acceptance filters and two acceptance mask regis-
ters. Acceptance Filter 15 can be used as either an
acceptance filter or an acceptance mask register. In
addition to three transmit and two receive buffers, there
are six more message buffers. One or more of these
additional buffers can be programmed as transmit or
receive buffers. These additional buffers can also be
programmed to automatically handle RTR messages.
Fourteen of sixteen acceptance filter registers can be
dynamically associated to any receive buffer and
acceptance mask register. One can use this capability
to associate more than one filter to any one buffer.
When a receive buffer is programmed to use standard
identifier messages, part of the full acceptance filter reg-
ister can be used as a data byte filter. The length of the
data byte filter is programmable from 0 to 18 bits. This
functionality simplifies implementation of high-level
protocols, such as the DeviceNet™ protocol.
The following is the list of resources available in Mode 1:
• Three transmit buffers: TXB0, TXB1 and TXB2
• Two receive buffers: RXB0 and RXB1
• Six buffers programmable as TX or RX: B0-B5
• Automatic RTR handling on B0-B5
• Sixteen dynamically assigned acceptance filters:
• Two dedicated acceptance mask registers;
• Programmable data filter on standard identifier
buffer: RXM0, RXM1
RXF0, RXF1, RXF2, RXF3, RXF4, RXF5
RXF0-RXF15
RXF15 programmable as third mask:
RXM0-RXM1, RXF15
messages: SDFLC
CAN Module Functional Modes
MODE 0 – LEGACY MODE
MODE 1 – ENHANCED LEGACY
MODE
DS39977C-page 443