PIC18F45K80-I/PT Microchip Technology, PIC18F45K80-I/PT Datasheet - Page 56

MCU PIC 32KB FLASH 44TQFP

PIC18F45K80-I/PT

Manufacturer Part Number
PIC18F45K80-I/PT
Description
MCU PIC 32KB FLASH 44TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F45K80-I/PT

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Number Of I /o
35
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP
Controller Family/series
PIC18
Ram Memory Size
4KB
Cpu Speed
16MIPS
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, USART
Processor Series
PIC18F45K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PIC18F66K80 FAMILY
REGISTER 3-1:
REGISTER 3-2:
DS39977C-page 56
bit 2
bit 1-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
2:
3:
4:
5:
6:
Reset state depends on the state of the IESO Configuration bit (CONFIG1H<7>).
Modifying these bits will cause an immediate clock frequency switch if the internal oscillator is providing
the device clocks.
Source selected by the INTSRC bit (OSCTUNE<7>).
Modifying these bits will cause an immediate clock source switch.
INTSRC = OSCTUNE<7> and MFIOSEL = OSCCON2<0>.
Lowest power option for an internal source.
When SOSC is selected to run from a digital clock input, rather than an external crystal, this bit has no
effect.
HFIOFS: HF-INTOSC Frequency Stable bit
1 = HF-INTOSC oscillator frequency is stable
0 = HF-INTOSC oscillator frequency is not stable
SCS<1:0>: System Clock Select bits
1x = Internal oscillator block (LF-INTOSC, MF-INTOSC or HF-INTOSC)
01 = SOSC oscillator
00 = Default primary oscillator (OSC1/OSC2 or HF-INTOSC with or without PLL. Defined by the
Unimplemented: Read as ‘0’
SOSCRUN: SOSC Run Status bit
1 = System clock comes from a secondary SOSC
0 = System clock comes from an oscillator other than SOSC
Unimplemented: Read as ‘0’
SOSCDRV: Secondary Oscillator Drive Control bit
1 = High-Power SOSC circuit is selected
0 = Low/High-Power select is done via the SOSCSEL<1:0> Configuration bits
SOSCGO: Oscillator Start Control bit
1 = Oscillator is running even if no other sources are requesting it.
0 = Oscillator is shut off if no other sources are requesting it (When the SOSC is selected to run from
Unimplemented: Read as ‘0’
MFIOFS: MF-INTOSC Frequency Stable bit
1 = MF-INTOSC is stable
0 = MF-INTOSC is not stable
MFIOSEL: MF-INTOSC Select bit
1 = MF-INTOSC is used in place of HF-INTOSC frequencies of 500 kHz, 250 kHz and 31.25 kHz
0 = MF-INTOSC is not used
SOSCRUN
a digital clock input, rather than an external crystal, this bit has no effect.)
R-0
FOSC<3:0> Configuration bits, CONFIG1H<3:0>.)
OSCCON: OSCILLATOR CONTROL REGISTER (CONTINUED)
OSCCON2: OSCILLATOR CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
U-0
SOSCDRV
R/W-0
Preliminary
(4)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SOSCGO
R/W-0
(1)
U-0
 2011 Microchip Technology Inc.
x = Bit is unknown
MFIOFS
R-x
MFIOSEL
R/W-0
bit 0

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