ISL80103IRAJZ-T Intersil, ISL80103IRAJZ-T Datasheet - Page 12

• Manufacturer Part Number: ISL80103IRAJZ-T
• Description: IC REG LDO ADJ 3A 10DFN
• Manufacturer: Intersil

Specifications of ISL80103IRAJZ-T

• Regulator Topology: Positive Adjustable
• Voltage - Output: 0.8 V ~ 5 V
• Voltage - Input: 2.2 V ~ 6 V
• Voltage - Dropout (typical): 0.12V @ 3A
• Number Of Regulators: 1
• Current - Output: 3A (Max)
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-VFDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Limit (min): -

Functional Description
Input Voltage Requirements
Despite other output voltages offered, this family of LDOs is
optimized for a true 2.5V to 1.8V conversion where the input
supply can have a tolerance of as much as ±10% for conditions
noted in the “Electrical Specifications” table on page 4. Minimum
guaranteed input voltage is 2.2V, however, due to the nature of
an LDO, V
plus dropout at the maximum rated current of the application if
active filtering (PSRR) is expected from V
spec of this family of LDOs has been generously specified in
order to allow applications to design for a level of efficiency that
can accommodate the smaller outline package for those
applications that cannot accommodate the profile of the
TO220/TO263.
Enable Operation
The Enable turn-on threshold is typically 770mV with a hysteresis of
135mV. An internal pull-up or pull-down resistor is available upon
request. As a result, this pin must not be left floating. This pin must
be tied to V
required for applications that use open collector or open drain
outputs to control the Enable pin. The Enable pin may be connected
directly to V
Power-Good Operation
Applications not using this feature must connect this pin to
ground. The PGOOD flag is an open-drain NMOS that can sink up
to 10mA during a fault condition. The PGOOD pin requires an
external pull-up resistor which is typically connected to the VOUT
pin. The PGOOD pin should not be pulled up to a voltage source
greater than V
voltage going below 84% of the nominal output voltage, or the
current limit fault, or low input voltage. The PGOOD does not
function during thermal shutdown. The PGOOD functions in
shutdown.
Soft-Start Operation (Optional)
If the current limit for in-rush current is acceptable in the
application, do not use this feature. The soft-start circuit controls
the rate at which the output voltage comes up to regulation at
power-up or LDO enable. A constant current charges an external
soft-start capacitor. The external capacitor always gets
discharged to ground pin potential at the beginning of start-up or
enabling. The discharge rate is the RC time constant of R
C
Performance Curves” beginning on page 6. R
ON-resistance of the pull down MOSFET, M8. R
typically.
The soft-start feature effectively reduces the in-rush current at
power-up or LDO enable until V
rush current can be an issue for applications that require large,
external bulk capacitances on V
current can be seen for a significant period of time. The in-rush
currents can cause V
cause V
between in-rush current and C
SS
. See Figures 26 through 29 in the “Typical Operating
OUT
IN
IN
IN
must be some margin higher than the output voltage
to shutdown. Figure 39 shows the relationship
if it is not used. A 1k
for applications that are always on.
IN
. The PGOOD fault can be caused by the output
IN
to drop below minimum which could
12
SS
OUT
OUT
Ω
with a C
to 10k
reaches regulation. The in-
where high levels of charging
IN
Ω
OUT
pull-up resistor will be
to V
PD
of 1000µF.
PD
OUT
ISL80102, ISL80103
is the
is 300Ω
. The dropout
PD
and
Output Voltage Selection
An external resistor divider is used to scale the output voltage
relative to the internal reference voltage. This voltage is then fed
back to the error amplifier. The output voltage can be
programmed to any level between 0.8V and 5V. An external
resistor divider, R
shown in Equation 1. The recommended value for R
1kΩ. R
External Capacitor Requirements
External capacitors are required for proper operation. Careful
attention must be paid to the layout guidelines and selection of
capacitor type and value to ensure optimal performance.
OUTPUT CAPACITOR
The ISL80102, ISL80103 applies state-of-the-art internal
compensation to keep selection of the output capacitor simple
for the customer. Stable operation over full temperature, V
range, V
capacitor types and values assuming a 10µF X5R/X7R is used
for local bypass on V
connected to V
no longer than 0.5cm.
Lower cost Y5V and Z5U type ceramic capacitors are acceptable
if the size of the capacitor is larger to compensate for the
significantly lower tolerance over X5R/X7R types. Additional
capacitors of any value in Ceramic, POSCAP or Alum/Tantalum
Electrolytic types may be placed in parallel to improve PSRR at
higher frequencies and/or load transient AC output voltage
tolerances.
INPUT CAPACITOR
The minimum input capacitor required for proper operation is
10µF having a ceramic dielectric. This minimum capacitor must
be connected to V
no longer than 0.5cm.
V
R
OUT
3
FIGURE 39. IN-RUSH CURRENT vs SOFT-START CAPACITANCE
=
=
R
3
4
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.5V
OUT
is then chosen according to Equation 2:
×
0
⎛
⎝
0
V
------------ - 1
0.5V
range and load extremes are guaranteed for all
×
OUT
⎛
⎜
⎝
OUT
R
------ -
R
–
3
4
3
IN
+
and Ground pins of the LDO with PCB traces
and R
⎞
⎠
20
1
and ground pins of the LDO with PCB traces
OUT
⎞
⎟
⎠
. This minimum capacitor must be
4
, is used to set the output voltage as
40
C
SS
(nF)
60
80
4
March 24, 2011
is 500Ω to
FN6660.2
100
IN
(EQ. 1)
(EQ. 2)