ISL80103IRAJZ-T Intersil, ISL80103IRAJZ-T Datasheet - Page 3

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ISL80103IRAJZ-T

Manufacturer Part Number
ISL80103IRAJZ-T
Description
IC REG LDO ADJ 3A 10DFN
Manufacturer
Intersil
Datasheet

Specifications of ISL80103IRAJZ-T

Regulator Topology
Positive Adjustable
Voltage - Output
0.8 V ~ 5 V
Voltage - Input
2.2 V ~ 6 V
Voltage - Dropout (typical)
0.12V @ 3A
Number Of Regulators
1
Current - Output
3A (Max)
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
10-VFDFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Limit (min)
-

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0
Pin Configuration
Pin Descriptions
Typical Application
*CSS is optional, (see Note 12) on page 5.
**C
PIN NUMBER
PB
is optional. See “Functional Description” on page 12 for more information.
9, 10
1, 2
OPEN DRAIN COMPATIBLE
3
4
5
6
7
8
2.5V ±10%
V
EN
IN
10kΩ
R
SENSE/ADJ
PIN NAME
1
ENABLE
EPAD
V
GND
DNC
V
PG
SS
OUT
IN
10µF
3
C
IN
Output voltage pin.
Remote voltage sense for internally fixed V
V
GND pin.
External cap adjusts in-rush current.
V
Do not connect this pin to ground or supply. Leave floating.
Input supply pin.
EPAD at ground potential. Soldering it directly to GND plane is optional.
OUT
IN
*C
independent chip enable. TTL and CMOS compatible.
SS
in regulation signal. Logic low defines when V
SENSE/ADJ
10
FIGURE 2. TYPICAL APPLICATION DIAGRAM
9
7
6
ISL80102, ISL80103
V
V
GND
VIN
VIN
ENABLE
SS
OUT
OUT
PG
1
2
3
4
5
ISL80102, ISL80103
ISL80102, ISL80103
(10 LD 3x3 DFN)
GND
TOP VIEW
5
OUT
options. ADJ pin for externally set V
VOUT
VOUT
10
9
8
7
6
ADJ
DESCRIPTION
PG
OUT
V
V
DNC
ENABLE
SS
IN
IN
is not in regulation. Must be grounded if not used.
1
2
3
4
1500pF
**C
C
10µF
PB
OUT
OUT
R
1.0kΩ
R
2.61kΩ
.
3
4
R
100kΩ
1.8V
PG
PGOOD
V
OUT
March 24, 2011
FN6660.2

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