RT8010-12GQW Richtek USA Inc, RT8010-12GQW Datasheet - Page 11

• Manufacturer Part Number: RT8010-12GQW
• Description: IC DCDC CONV STP-DN SYNC 6WDFN
• Manufacturer: Richtek USA Inc
• Type: Step-Down (Buck), PWMr

Specifications of RT8010-12GQW

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 1.2V
• Current - Output: 1A
• Frequency - Switching: 1.5MHz
• Voltage - Input: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 6-WDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The output ripple is highest at maximum input voltage
since ΔI
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, V
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at V
part.
Output Voltage Programming
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 4.
DS8010/A-06 February 2011
IN
L
increases with input voltage. Multiple capacitors
. At best, this ringing can couple to the output
Figure 4. Setting the Output Voltage
RT8010/A
GND
FB
IN
large enough to damage the
V
OUT
R1
R2
For adjustable voltage mode, the output voltage is set by
an external resistive divider according to the following
equation :
where V
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as :
Efficiency = 100% − (L1+ L2+ L3+ ...)
where L1, L2, etc. are the individual losses as a percentage
of input power. Although all dissipative elements in the
circuit produce losses, two main sources usually account
for most of the losses : VIN quiescent current and I
losses.
The VIN quiescent current loss dominates the efficiency
loss at very low load currents whereas the I
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
actual power lost is of no consequence.
1. The VIN quiescent current appears due to two factors
including : the DC bias current as given in the electrical
characteristics and the internal main switch and
synchronous switch gate charge currents. The gate charge
current results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of charge
ΔQ moves from V
The resulting ΔQ/Δt is the current out of V
larger than the DC bias current. In continuous mode,
I
where Q
and bottom switches. Both the DC bias and gate charge
losses are proportional to V
be more pronounced at higher supply voltages.
V
GATECHG
OUT
=
REF
V
T
= f (Q
REF
and Q
is the internal reference voltage (0.6V typ.)
⎛
⎜
⎝
T
1+
+ Q
B
IN
are the gate charges of the internal top
R2
R1
B
to ground.
)
⎞
⎟
⎠
IN
and thus their effects will
RT8010/A
IN
www.richtek.com
that is typically
2
R loss
2
11
R