SX1231-31SKB915 Semtech, SX1231-31SKB915 Datasheet - Page 33

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SX1231-31SKB915

Manufacturer Part Number
SX1231-31SKB915
Description
TVS
Manufacturer
Semtech
Datasheets

Specifications of SX1231-31SKB915

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4. Operating Modes
4.1. Basic Modes
The circuit can be set in 5 different basic modes which are described in Table 14.
By default, when switching from a mode to another one, the sub-blocks are woken up according to a pre-defined and
optimized sequence. Alternatively, these operating modes can be selected directly by disabling the automatic sequencer
(SequencerOff in RegOpMode = 1).
Table 14 Basic Transceiver Modes
4.2. Automatic Sequencer and Wake-Up Times
By default, when switching from one operating mode to another, the circuit takes care of the sequence of events in such a
way that the transition timing is optimized. For example, when switching from Sleep mode to Transmit mode, the SX1231
goes first to Standby mode (XO started), then to frequency synthesizer mode, and finally, when the PLL has locked, to
transmit mode. Entering transmit mode is also made according to a predefined sequence starting with the wake-up of the
PA regulator before applying a ramp-up on the PA and generating the DCLK clock.
Four specific cases can be highlighted:
These timings are details in sections 4.2.1 and 4.2.3.
In applications where the target average power consumption, or the target startup time, do not require setting the SX1231
in the lowest power modes (Sleep or Standby), the respective timings TS_OSC and TS_FS in the former equations can be
omitted.
Rev 3 - April 2010
ADVANCED COMMUNICATIONS & SENSING
The crystal oscillator wake-up time, TS_OSC, is directly related to the time for the crystal oscillator to reach its steady
state. It depends notably on the crystal characteristics.
The frequency synthesizer wake-up time, TS_FS, is directly related to the time needed by the PLL to reach its steady
state. The signal PLL_LOCK, provided on an external pin, gives an indication of the lock status. It goes high when the
PLL reaches its locking range.
Transmitter Wake Up time from Sleep mode
Receiver Wake Up time from Sleep mode
Receiver Wake Up time from Sleep mode, AGC enabled
Receiver Wake Up time from Sleep mode, AGC and AFC enabled
in RegOpMode
ListenOn
0
0
0
0
0
1
in RegOpMode
Mode
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
x
Selected mode
Stand-by Mode
Transmit Mode
Receive Mode
Listen Mode
Sleep Mode
FS Mode
Page 33
Frequency synthesizer and transmitter
Frequency synthesizer and receiver
= TS_OSC + TS_FS + TS_RE_AGC
= TS_OSC + TS_FS + TS_TR
= TS_OSC + TS_FS + TS_RE_AGC&AFC
= TS_OSC + TS_FS + TS_RE
Top regulator and crystal oscillator
See Listen Mode, section 4.3
Frequency synthesizer
Enabled blocks
None
DATASHEET
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SX1231

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