DC1298A-LA Linear Technology, DC1298A-LA Datasheet
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DC1298A-LA
Specifications of DC1298A-LA
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DC1298A-LA Summary of contents
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... An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. V ...
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LTM9002 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Supply Voltage (V ) ................................ –0.3V to 3.6V CC Supply Voltage ( ......................... –0. Digital Output Ground Voltage (OGND) ........ –0. – Input ...
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ELECTRICAL CHARACTERISTICS temperature range, otherwise specifi cations are at T SYMBOL PARAMETER G Gain DIFF G Gain Temperature Drift TEMP Gain Matching V Input Voltage Range for –1dBFS IN V Input Common Mode Voltage Range INCM R Differential Input Impedance ...
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LTM9002 DYNAMIC ACCURACY otherwise specifi cations are 25°C. Input = –1dBFS. (Note 3) A SYMBOL PARAMETER SNR Signal-to-Noise Ratio SFDR Spurious Free Dynamic Range, 2nd or 3rd Harmonic SFDR Spurious Free Dynamic Range 4th or Higher S/(N+D) ...
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DIGITAL INPUTS AND OUTPUTS temperature range, otherwise specifi cations are at T SYMBOL PARAMETER Logic Inputs (AMPSHDN) V Low Level Input Voltage IL V High Level Input Voltage IH I Input Low Current IL I Input High Current IH Logic ...
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LTM9002 TIMING CHARACTERISTICS range, otherwise specifi cations are SYMBOL PARAMETER f Sampling Frequency S t CLK Low Time L t CLK High Time H t CLK Low Time L t CLK High Time H t Absolute Aperture ...
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TIMING DIAGRAMS t AP ANALOG N INPUT t H CLKA = CLKB t D D0-D13 CLKOUT ANALOG INPUT A ANALOG INPUT B CLKA = CLKB = MUX DA0-DA13 DB0-DB13 CLKOUT Dual Digital Output Bus Timing N + ...
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LTM9002 TIMING DIAGRAMS SCK SDI CS/LD TYPICAL PERFORMANCE CHARACTERISTICS (LTM9002-AA) Differential Non-Linearity (DNL) vs Output Code 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 4096 8192 12288 16384 OUTPUT CODE 9002 G01 ...
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TYPICAL PERFORMANCE CHARACTERISTICS (LTM9002-AA) 64k Point FFT –1dBFS, SENSE = V 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 64k Point FFT –1dBFS, SENSE = ...
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LTM9002 TYPICAL PERFORMANCE CHARACTERISTICS SNR vs Frequency (Channel FREQUENCY (MHz) Input Impedance vs Frequency (Channel B) 400 350 MAGNITUDE 300 250 200 150 100 PHASE ...
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PIN FUNCTIONS Supply Pins GND (Pins A1-2, A5-7, B2-4, B6, C2-3, C6, D1-3, D5-7, D9-10, E5-6, E9-10, F1-2, F5-7, F9-10, G2-3, G6, H2-4, H6, J1-2, J5-7): ADC Power Ground. OGND (Pins A12, C9, G9, J12): Output Driver Ground. OV (Pins ...
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LTM9002 PIN FUNCTIONS Control Pins ADCSHDNA (Pin G7): Channel A Shutdown Mode Selec- tion Pin. Connecting ADCSHDNA to GND and OEA to GND results in normal operation with the outputs enabled. Connecting ADCSHDNA to GND and OEA ...
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PIN FUNCTIONS Digital Outputs CLKOUT (Pin E12, LTM9002-AA): ADC Data Ready Clock Output. Latch data on the falling edge of CLKOUT. CLKOUT is derived from CLKB. Tie CLKA to CLKB for simultaneous operation. OFB (Pin E12, LTM9002-LA): Overfl ow/Underfl ow ...
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LTM9002 BLOCK DIAGRAM Functional Block Diagram (Only One Channel is Shown ADC FILTER DRIVER – IN VOLTAGE AMPSHDN REFERENCE VOLTAGE REFERENCE DAC SENSE *OFA AND OFB ON LTM9002-LA 14 PIPELINED ADC SECTIONS INPUT 1st ...
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OPERATION DYNAMIC PERFORMANCE DEFINITIONS Signal-to-Noise Plus Distortion Ratio The signal-to-noise plus distortion ratio [S/(N + D)] is the ratio between the RMS amplitude of the fundamen- tal input frequency and the RMS amplitude of all other frequency components at the ...
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... ADC The fi nal result is a fully integrated, accurately tested and optimized solution in the same package. For more details 9002 F01 on the semi-custom receiver subsystem program, contact Linear Technology. ADC SAMPLE FILTER RATE 26dB 170MHz LPF ...
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OPERATION Note that not all combinations in Table 1 are possible at this time and specifi ed performance may differ signifi cantly from existing values. AMPLIFIER OPERATION The amplifi ers used in the LTM9002 are low noise and low distortion ...
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LTM9002 OPERATION reference adjusts the ADC span proportionately; see Adjusting the full-scale input range. Powering down the auxiliary DAC disables the ADC span trim control. When the auxiliary DAC is powered down, connect SENSE external reference. ...
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OPERATION LTM9002 9002f 19 ...
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LTM9002 APPLICATIONS INFORMATION INPUT SPAN The LTM9002 is confi gured with a given input span and input impedance. With the amplifi er gain and the ADC input network described above for LTM9002-AA, the full-scale input range of the driver circuit ...
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APPLICATIONS INFORMATION R S 0.1μF 50Ω – 0.1μ 0.1μF 50Ω – Figure 6. Input Termination for Differential 50Ω Input Impedance Using Shunt ...
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LTM9002 APPLICATIONS INFORMATION exceed ±50mV. The internal 1000pF capacitor provides a corner frequency of 64kHz when used with the 2.5k ex- ternal resistor. An additional 0.1μF bypass capacitor may be required at the SENSE pin. The auxiliary DACs can be ...
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APPLICATIONS INFORMATION It is recommended that CLKA and CLKB are shorted together and driven by the same clock source small time delay is desired between when the two channels sample the analog inputs, CLKA and CLKB can be ...
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LTM9002 APPLICATIONS INFORMATION Clock Duty Cycle Stabilizer An optional clock duty cycle stabilizer circuit ensures high performance even if the input clock has a non 50% duty cycle. Using the clock duty cycle stabilizer is recommended for most applications. To ...
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APPLICATIONS INFORMATION Data Format Using the MODE pin, the ADC parallel digital output can be selected for offset binary or 2’s complement format. Note that MODE controls both channel A and channel B. Connecting MODE to GND or 1/3 V ...
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LTM9002 APPLICATIONS INFORMATION the output busses are swapped and channel A comes out on DBx; channel B comes out on DAx. To multiplex both channels onto a single output bus, connect MUX, CLKA and CLKB together (see the Timing Diagram ...
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... SUGGESTED PCB LAYOUT TOP VIEW Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. LGA Package 108-Lead (15mm × ...
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... SNR, 9mm × 9mm QFN 24.7dBm IIP3 at 1.9GHz 11.7dB, Single-Ended RF and LO Ports, 3.3V Supply 60dBm IIP2 at 1.9GHz 12.7dB, Low DC Offsets 3V, 90mA, 39.5dBm OIP3 at 300MHz, 6dB NF 3V, 45mA, 45.5dBm OIP3 at 140MHz, 6dB NF www.linear.com ● 9002f LT 0509 • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2009 ...