LMK03033CISQ National Semiconductor, LMK03033CISQ Datasheet
LMK03033CISQ
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LMK03033CISQ Summary of contents
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... Test and Measurement ■ Military / Aerospace System Diagram TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2008 National Semiconductor Corporation Features ■ Integrated VCO with very low phase noise floor ■ Integrated Integer-N PLL with outstanding normalized phase noise contribution of -224 dBc/Hz ■ ...
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Functional Block Diagram www.national.com 2 20211401 ...
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Connection Diagram 48-Pin LLP Package 3 20211402 www.national.com ...
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Pin Descriptions Pin # 13, 16, 19, 22, Vcc1, Vcc2, Vcc3, Vcc4, Vcc5, Vcc6, Vcc7, Vcc8, Vcc9, Vcc10, 26, 30, 31, 33, 37, 40 ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Parameter Power Supply Voltage Input Voltage Storage Temperature Range Lead Temperature (solder 4 s) Junction Temperature Recommended Operating Conditions Parameter Ambient Temperature Power Supply Voltage Note 1: " ...
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Electrical Characteristics ≤ ≤ ≤ (3.15 V Vcc 3.45 V, -40 ° most likely parametric norms at Vcc = 3 characterization and are not guaranteed). Symbol Parameter Power Supply Current I CC (Note ...
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Symbol Parameter f VCO Tuning Range Fout Allowable Temperature Drift for |Δ Continuous Lock Output Power Ω load driven by Fout p Fout (Note 10) K Fine Tuning Sensitivity (Note 9) VCO Fout RMS Period ...
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Symbol Parameter Clock Distribution Section (Notes 12, 13) - LVDS Clock Outputs Jitter Additive RMS Jitter (Note 12) ADD t CLKoutX to CLKoutY (Note 14) SKEW V Differential Output Voltage OD Change in magnitude of V ΔV OD complementary output ...
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Symbol Parameter t Data to Clock Set Up Time CS t Data to Clock Hold Time CH t Clock Pulse Width High CWH t Clock Pulse Width Low CWL t Clock to Enable Set Up Time ES t Enable to ...
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Charge Pump Current Specification Definitions I1 = Charge Pump Sink Current Charge Pump Sink Current Charge Pump Sink Current Charge Pump Source Current Charge ...
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Typical Performance Characteristics LVDS Peak to Peak Voltage (Single-Ended) LVDS Output Buffer Noise Floor (Note 18) Delay Noise Floor (Notes 18, 19) Note 17: These plots show performance at frequencies beyond what the part is guaranteed to operate at to ...
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Functional Description The LMK03000 family of precision clock conditioners com- bine the functions of jitter cleaning/reconditioning, multiplica- tion, and distribution of a reference clock. The devices integrate a Voltage Controlled Oscillator (VCO), a high per- formance Integer-N Phase Locked ...
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CLKout OUTPUT STATES Each clock output may be individually enabled with the CLKoutX_EN bits. Each individual output enable control bit is gated with the Global Output Enable input pin (GOE) and the Global Output Enable bit (EN_CLKout_Global). All clock ...
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General Programming Information The LMK03000 family of devices are programmed using sev- eral 32-bit registers which control the device's operation. The registers consist of a data field and an address field. The last 4 register bits, ADDR[3:0] form the ...
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CLKout0_EN CLKout1_EN CLKout2_EN CLKout3_EN CLKout4_EN CLKout5_EN CLKout6_EN CLKout7_EN RESET Register 15 www.national.com ...
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DIV4 Register www.national.com POWERDOWN EN_CLKout_Global EN_Fout 16 ...
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REGISTER Registers R0 through R7 control the eight clock outputs. Reg- ister R0 controls CLKout0, Register R1 controls CLKout1, and so on. There is one additional bit in register R0 called RESET. Default Register Settings after ...
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CLKoutX_DLY[3:0] -- Clock Output Delays These bits control the delay stages for each clock output. In order for these delays to be active, the respective CLKoutX_MUX bit must be set to either "Delayed" or "Divided and Delayed" mode. By ...
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VCO_R4_LF[2:0] R4 Value (kΩ) Low (~200 Ω) (default 2.6.4 OSCin_FREQ[7:0] -- Oscillator Input Calibration Adjustment These bits are to be programmed to the OSCin frequency. If the OSCin frequency is not an ...
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VCO_DIV[3:0] -- VCO Divider These bits program the divide value for the VCO Divider. The VCO Divider follows the VCO output and precedes the clock distribution blocks. Since the VCO Divider is in the feedback path from the VCO ...
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Application Information 3.1 SYSTEM LEVEL DIAGRAM Figure 3 shows an LMK03000 family device used in a typical application. In this setup the clock may be multiplied, recon- ditioned, and redistributed. Both the OSCin/OSCin* and CLK- outX/CLKoutX* pins can be ...
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LOOP FILTER The internal charge pump is directly connected to the inte- grated loop filter components. The first and second pole of the loop filter are externally attached as shown in Figure 4. When the loop filter is designed, ...
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CURRENT CONSUMPTION / POWER DISSIPATION CALCULATIONS Due to the myriad of possible configurations the following ta- ble serves to provide enough information to allow the user to Table 3.5 - Block Current Consumption Block Condition Entire device, All outputs ...
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THERMAL MANAGEMENT Power consumption of the LMK03000 family of devices can be high enough to require attention to thermal management. For reliability and performance reasons the die temperature should be limited to a maximum of 125 °C. That is, ...
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FIGURE 7. Differential LVPECL Operation, DC Coupling FIGURE 8. Differential LVPECL Operation, DC Coupling, Thevenin Equivalent 3.7.2 Termination for AC Coupled Differential Operation AC coupling allows for shifting the DC bias level (common mode voltage) when driving different receiver standards. ...
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Termination for Single-Ended Operation A balun can be used with either LVDS or LVPECL drivers to convert the balanced, differential signal into an unbalanced, single-ended signal possible to use an LVPECL driver as one or two separate ...
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FIGURE 15. Differential Sine Wave Input FIGURE 16. Recommended OSCin Power for Operation with a Sine Wave Input 3.9 MORE THAN EIGHT OUTPUTS WITH AN LMK03000 FAMILY DEVICE The LMK03000 family devices include eight or less outputs. When more than ...
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... LMK03000DISQ LMK03000DISQX LMK03001CISQ LMK03001CISQX LMK03001ISQ LMK03001ISQX 1.52 GHz LMK03001DISQE LMK03001DISQ LMK03001DISQX LMK03033CISQ LMK03033CISQX 2 GHz LMK03033ISQ LMK03033ISQX www.national.com inches (millimeters) unless otherwise noted Leadless Leadframe Package (Bottom View) 48 Pin LLP (SQA48A) Package Performance Grade 250 Unit Tape and Reel 400 fs 2500 Unit Tape and Reel ...
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Notes 29 www.national.com ...
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