NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 246

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.23.2
5.23.2.1
5.23.2.2
246
SPI Device Compatibility Requirements
A variety of SPI flash devices exist in the market. In order for a SPI device to be
compatible with the ICH8 it must meet the minimum requirements detailed in the
following sections.
Device Requirements for System BIOS Storage Only
A serial flash device must meet the following minimum requirements when used
explicitly for system BIOS storage.
Device Requirements for Intel
ICH8 has added the capability that a single SPI flash device can be used to store
system BIOS, Intel
AMT Firmware and GbE EEPROM information. This unified flash configuration for system
BIOS
and Intel AMT firmware must meet the following minimum requirements to be
compatible with the ICH8:
The following are requirements that are in common with System BIOS only
configuration as listed in
• Erase size capability of at least one of the following: 64 Kbytes, 4 Kbytes, or 256
• Required command set and associated opcodes (Refer to
• JEDEC ID Device identification command (Refer to
• Device must support multiple writes to a page without requiring a preceding erase
• Serial flash device must ignore the upper address bits such that an address of
• SPI Compatible Mode 0 support (clock phase is 0 and data is latched on the rising
• If the device receives a command that is not supported, the device must complete
• An erase command (page, sector, block, chip, etc.) must set to 1 (FFh) all bits
• Minimum density of 4 Mbit (Platform dependent based on size of BIOS).
bytes.
cycle (Refer to
FFFFFFh simply aliases to the top of the flash memory.
edge of the clock).
the cycle gracefully without any impact on the flash content.
inside the designated area (page, sector, block, chip, etc.).
— If two serial flash devices will be used, they must have the same erase size
capabilities and opcodes.
Section
Section
5.23.3.4)
5.23.2.1:
®
AMT, ASF and AFSC Firmware
Section
Section
5.23.3.3).
Intel
®
Functional Description
ICH8 Family Datasheet
5.23.3.1).