IS42S16160B-7TL INTEGRATED SILICON SOLUTION (ISSI), IS42S16160B-7TL Datasheet - Page 24

IC, SDRAM, 256MBIT, 143MHZ, TSOP-54

IS42S16160B-7TL

Manufacturer Part Number
IS42S16160B-7TL
Description
IC, SDRAM, 256MBIT, 143MHZ, TSOP-54
Manufacturer
INTEGRATED SILICON SOLUTION (ISSI)
Datasheet

Specifications of IS42S16160B-7TL

Memory Type
DRAM - Sychronous
Memory Configuration
32M X 8
Access Time
7ns
Page Size
256Mbit
Ic Interface Type
Parallel
Memory Case Style
TSOP
No. Of Pins
54
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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IS42S83200B,
REGISTER DEFINITION
Mode Register
The mode register is used to define the specific mode of
operation of the SDRAM. This definition includes the
selection of a burst length, a burst type, a CAS latency, an
operating mode and a write burst mode, as shown in MODE
REGISTER DEFINITION.
The mode register is programmed via the LOAD MODE
REGISTER command and will retain the stored information
until it is programmed again or the device loses power.
MODE REGISTER DEFINITION
24
BA1 BA0 A12
IS42S16160B
A11
Reserved
A10
Write Burst Mode
(1)
M9
0
1
A9
Mode
Programmed Burst Length
Single Location Access
Operating Mode
A8
M8 M7
— —
0
0
A7
Defined
M6-M0
A6
Latency Mode
M6 M5 M4
0
0
0
0
1
1
1
1
Mode
Standard Operation
All Other States Reserved
A5
0
0
1
1
0
0
1
1
Mode register bits M0-M2 specify the burst length, M3
specifies the type of burst (sequential or interleaved), M4- M6
specify the CAS latency, M7 and M8 specify the operating
mode, M9 specifies the WRITE burst mode, and M10, M11,
and M12 are reserved for future use.
The mode register must be loaded when all banks are idle,
and the controller must wait the specified time before
initiating the subsequent operation. Violating either of these
requirements will result in unspecified operation.
0
1
0
1
0
1
0
1
Integrated Silicon Solution, Inc. — www.issi.com
A4
Burst Type
CAS Latency
M3
0
1
A3
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
2
3
Interleaved
Sequential
1. To ensure compatibility with future devices,
A2
Burst Length
Type
should program BA1, BA0, A12, A11, A10 = "0"
M2
0
0
0
0
1
1
1
1
A1
M1
0
0
1
1
0
0
1
1
M0
0
1
0
1
0
1
0
1
A0
Reserved
Reserved
Reserved
Address Bus (Ax)
Mode Register (Mx)
Full Page
M3=0
1
2
4
8
Reserved
Reserved
Reserved
Reserved
M3=1
1
2
4
8
07/28/08
Rev. D

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