ATMEGA168PA-PU Atmel, ATMEGA168PA-PU Datasheet - Page 268
ATMEGA168PA-PU
Manufacturer Part Number
ATMEGA168PA-PU
Description
MCU, 8BIT, AVR, 16K FLASH, 28PDIP
Manufacturer
Atmel
Datasheet
1.ATMEGA48A-PU.pdf
(566 pages)
Specifications of ATMEGA168PA-PU
Controller Family/series
Atmega
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
No.
RoHS Compliant
Core Size
8bit
Program Memory Size
16KB
Oscillator Type
External, Internal
Rohs Compliant
Yes
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Manufacturer:
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24. debugWIRE On-chip Debug System
24.1
24.2
24.3
8271C–AVR–08/10
Features
Overview
Physical Interface
•
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The debugWIRE On-chip debug system uses a One-wire, bi-directional interface to control the
program flow, execute AVR instructions in the CPU and to program the different non-volatile
memories.
When the debugWIRE Enable (DWEN) Fuse is programmed and Lock bits are unprogrammed,
the debugWIRE system within the target device is activated. The RESET port pin is configured
as a wire-AND (open-drain) bi-directional I/O pin with pull-up enabled and becomes the commu-
nication gateway between target and emulator.
Figure 24-1. The debugWIRE Setup
Figure 24-1
connector. The system clock is not affected by debugWIRE and will always be the clock source
selected by the CKSEL Fuses.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Complete Program Flow Control
Emulates All On-chip Functions, Both Digital and Analog, except RESET Pin
Real-time Operation
Symbolic Debugging Support (Both at C and Assembler Source Level, or for Other HLLs)
Unlimited Number of Program Break Points (Using Software Break Points)
Non-intrusive Operation
Electrical Characteristics Identical to Real Device
Automatic Configuration System
High-Speed Operation
Programming of Non-volatile Memories
shows the schematic of a target MCU, with debugWIRE enabled, and the emulator
dW
GND
dW(RESET)
VCC
1.8 - 5.5V
268
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