ATMEGA168PA-PU Atmel, ATMEGA168PA-PU Datasheet - Page 293

MCU, 8BIT, AVR, 16K FLASH, 28PDIP

ATMEGA168PA-PU

Manufacturer Part Number
ATMEGA168PA-PU
Description
MCU, 8BIT, AVR, 16K FLASH, 28PDIP
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA168PA-PU

Controller Family/series
Atmega
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
No.
RoHS Compliant
Core Size
8bit
Program Memory Size
16KB
Oscillator Type
External, Internal
Rohs Compliant
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA168PA-PU
Manufacturer:
TI
Quantity:
1 240
26.8.16
In
Table 26-13. Boot Size Configuration, ATmega328/328P
Table 26-14. Read-While-Write Limit, ATmega328/328P
For details about these two section, see
Write Section” on page
Table 26-15. Explanation of Different Variables used in
Note:
8271C–AVR–08/10
BOOTSZ1
Section
Read-While-Write section (RWW)
No Read-While-Write section (NRWW)
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
Table 26-13
1
1
0
0
1. Z15: always ignored
ATmega328 and ATmega328P Boot Loader Parameters
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
See
Programming.
BOOTSZ0
through
”Addressing the Flash During Self-Programming” on page 284
1
0
1
0
Table
280.
Boot
Size
256 words
512 words
1024 words
2048 words
PC[13:6]
Note:
PC[5:0]
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
13
5
26-15, the parameters used in the description of the self programming are given.
The different BOOTSZ Fuse configurations are shown in
Pages
16
32
4
8
”NRWW – No Read-While-Write Section” on page 280
Corresponding
Application
Flash
Section
0x0000 - 0x3EFF
0x0000 - 0x3DFF
0x0000 - 0x3BFF
0x0000 - 0x37FF
Z-value
Z14:Z7
Z6:Z1
Z14
Z6
(1)
Figure 26-3
Boot
Loader
Flash
Section
0x3F00 - 0x3FFF
0x3E00 - 0x3FFF
0x3C00 - 0x3FFF
0x3800 - 0x3FFF
Description
Most significant bit in the Program Counter. (The Program Counter
is 14 bits PC[13:0])
Most significant bit which is used to address the words within
one page (64 words in a page requires 6 bits PC [5:0])
Bit in Z-register that is mapped to PCMSB. Because Z0 is not used,
the ZPCMSB equals PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB. Because Z0 is not
used, the ZPAGEMSB equals PAGEMSB + 1.
Program counter page address: Page select, for page erase and
page write
Program counter word address: Word select, for filling temporary
buffer (must be zero during page write operation)
Pages
224
32
and the Mapping to the Z-pointer, ATmega328/328P
for details about the use of Z-pointer during Self-
End
Application
Section
0x3EFF
0x3DFF
0x3BFF
0x37FF
Address
0x0000 - 0x37FF
0x3800 - 0x3FFF
Figure 26-2 on page
Boot Reset Address (Start Boot
Loader Section)
0x3F00
0x3E00
0x3C00
0x3800
and
”RWW – Read-While-
282.
293

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