ATMEGA168PA-PU Atmel, ATMEGA168PA-PU Datasheet - Page 96
ATMEGA168PA-PU
Manufacturer Part Number
ATMEGA168PA-PU
Description
MCU, 8BIT, AVR, 16K FLASH, 28PDIP
Manufacturer
Atmel
Datasheet
1.ATMEGA48A-PU.pdf
(566 pages)
Specifications of ATMEGA168PA-PU
Controller Family/series
Atmega
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
No.
RoHS Compliant
Core Size
8bit
Program Memory Size
16KB
Oscillator Type
External, Internal
Rohs Compliant
Yes
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA168PA-PU
Manufacturer:
TI
Quantity:
1 240
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14.2.1
14.2.2
8271C–AVR–08/10
Definitions
Registers
Figure 14-1. 8-bit Timer/Counter Block Diagram
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare Unit, in this case Compare Unit A or Compare Unit B. However, when using the register or
bit defines in a program, the precise form must be used, i.e., TCNT0 for accessing
Timer/Counter0 counter value and so on.
The definitions in
Table 14-1.
The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit
registers. Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the
Timer Interrupt Flag Register (TIFR0). All interrupts are individually masked with the Timer Inter-
rupt Mask Register (TIMSK0). TIFR0 and TIMSK0 are not shown in the figure.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
BOTTOM
MAX
TOP
Definitions
The counter reaches the BOTTOM when it becomes 0x00.
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest value in the
count sequence. The TOP value can be assigned to be the fixed value 0xFF
(MAX) or the value stored in the OCR0A Register. The assignment is depen-
dent on the mode of operation.
Table 14-1
Timer/Counter
TCCRnA
OCRnA
TCNTn
OCRnB
=
=
are also used extensively throughout the document.
Direction
Count
Clear
Control Logic
TOP
=
TCCRnB
Value
BOTTOM
Fixed
TOP
clk
=
Tn
0
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
( From Prescaler )
Waveform
Waveform
Detector
Edge
OCnA
OCnB
Tn
96
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