ST62T62CB6 STMicroelectronics, ST62T62CB6 Datasheet - Page 35

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ST62T62CB6

Manufacturer Part Number
ST62T62CB6
Description
8BIT MCU OTP 2K+EEPROM, 62T62, DIP
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST62T62CB6

Controller Family/series
ST6
No. Of I/o's
9
Eeprom Memory Size
64Byte
Ram Memory Size
128Byte
Cpu Speed
8MHz
No. Of
RoHS Compliant
Core Size
8bit
Program Memory Size
1836B
Oscillator Type
External Only
Processor Series
ST62T6x
Core
ST6
Data Bus Width
8 bit
Program Memory Type
EPROM
Data Ram Size
128 B
Interface Type
SPI, UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
9
Number Of Timers
2
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Package / Case
PDIP-16
Development Tools By Supplier
ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / Rohs Status
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0
POWER SAVING MODE (Cont’d)
3.5.3 Exit from WAIT and STOP Modes
The following paragraphs describe how the MCU
exits from WAIT and STOP modes, when an inter-
rupt occurs (not a Reset). It should be noted that
the restart sequence depends on the original state
of the MCU (normal, interrupt or non-maskable in-
terrupt mode) prior to entering WAIT or STOP
mode, as well as on the interrupt type.
Interrupts do not affect the oscillator selection.
3.5.3.1 Normal Mode
If the MCU was in the main routine when the WAIT
or STOP instruction was executed, exit from Stop
or Wait mode will occur as soon as an interrupt oc-
curs; the related interrupt routine is executed and,
on completion, the instruction which follows the
STOP or WAIT instruction is then executed, pro-
viding no other interrupts are pending.
3.5.3.2 Non Maskable Interrupt Mode
If the STOP or WAIT instruction has been execut-
ed during execution of the non-maskable interrupt
routine, the MCU exits from the Stop or Wait mode
as soon as an interrupt occurs: the instruction
which follows the STOP or WAIT instruction is ex-
ecuted, and the MCU remains in non-maskable in-
terrupt mode, even if another interrupt has been
generated.
3.5.3.3 Normal Interrupt Mode
If the MCU was in interrupt mode before the STOP
or WAIT instruction was executed, it exits from
STOP or WAIT mode as soon as an interrupt oc-
curs. Nevertheless, two cases must be consid-
ered:
– If the interrupt is a normal one, the interrupt rou-
tine in which the WAIT or STOP mode was en-
– In the event of a non-maskable interrupt, the
Notes:
To achieve the lowest power consumption during
RUN or WAIT modes, the user program must take
care of:
– configuring unused I/Os as inputs without pull-up
– placing all peripherals in their power down
When the hardware activated Watchdog is select-
ed, or when the software Watchdog is enabled, the
STOP instruction is disabled and a WAIT instruc-
tion will be executed in its place.
If all interrupt sources are disabled (GEN low), the
MCU can only be restarted by a Reset. Although
setting GEN low does not mask the NMI as an in-
terrupt, it will stop it generating a wake-up signal.
The WAIT and STOP instructions are not execut-
ed if an enabled interrupt request is pending.
tered will be completed, starting with the
execution of the instruction which follows the
STOP or the WAIT instruction, and the MCU is
still in the interrupt mode. At the end of this rou-
tine pending interrupts will be serviced in accord-
ance with their priority.
non-maskable interrupt service routine is proc-
essed first, then the routine in which the WAIT or
STOP mode was entered will be completed by
executing the instruction following the STOP or
WAIT instruction. The MCU remains in normal
interrupt mode.
(these should be externally tied to well defined
logic levels);
modes before entering STOP mode;
ST62T52C ST62T62C/E62C
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