UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 215

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

(4) Timing of holding data by capture register
(5) Setting valid edge
(6) Re-triggering one-shot pulse
(a) When the valid edge is input to the TI000/TI010 pin and the reverse phase of the TI000 pin is detected while
(b) The values of CR000 and CR010 are not guaranteed after 16-bit timer/event counter 00 stops.
Set the valid edge of the TI000 pin while the timer operation is stopped (TMC003 and TMC002 = 00). Set the
valid edge by using ES000 and ES001.
Make sure that the trigger is not generated while an active level is being output in the one-shot pulse output mode.
Be sure to input the next trigger after the current active level is output.
CR000/CR010 is read, CR010 performs a capture operation but the read value of CR000/CR010 is not
guaranteed. At this time, an interrupt signal (INTTM000/INTTM010) is generated when the valid edge of the
TI000/TI010 pin is detected (the interrupt signal is not generated when the reverse-phase edge of the TI000
pin is detected).
When the count value is captured because the valid edge of the TI000/TI010 pin was detected, read the
value of CR000/CR010 after INTTM000/INTTM010 is generated.
Value captured to CR010
Capture read signal
TM00 count value
Count pulse
Edge input
INTTM010
Figure 6-60. Timing of Holding Data by Capture Register
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00
X
Capture operation
N
User’s Manual U18698EJ1V0UD
N + 1
N + 2
N + 1
M
Capture operation is performed
but read value is not guaranteed.
M + 1
M + 2
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