UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 492
UPD78F0535GB(T)-UEU-A
Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0535GB(T)-UEU-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
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18.4 Operations of Multiplier/Divider
18.4.1 Multiplication operation
492
• Initial setting
• During operation
• End of operation
• Next operation
1. Set operation data to multiplication/division data register A0L (MDA0L) and multiplication/division data register
2. Set bits 0 (DMUSEL0) and 7 (DMUE) of multiplier/divider control register 0 (DMUC0) to 1. Operation will start.
3. The operation will be completed when 16 peripheral hardware clocks (f
4. The operation result data is stored in the MDA0L and MDA0H registers.
5. DMUE is cleared to 0 (end of operation).
6. After the operation, an interrupt request signal (INTDMU) is generated.
7. To execute multiplication next, start from the initial setting in 18.4.1 Multiplication operation.
8. To execute division next, start from the initial setting in 18.4.2 Division operation.
B0 (MDB0).
the operation (intermediate data is stored in the MDA0L and MDA0H registers during operation, and therefore
the read values of these registers are not guaranteed).
CHAPTER 18 MULTIPLIER/DIVIDER (
User’s Manual U17260EJ6V0UD
PD78F0534, 78F0535, 78F0536, 78F0537, AND 78F0537D ONLY)
PRS
) have been issued after the start of
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