UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 105
UPD78F9502MA-CAC-A
Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F9502MA-CAC-A.pdf
(229 pages)
Specifications of UPD78F9502MA-CAC-A
Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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Before each interrupt request acknowledgement, the EI instruction is issued, the interrupt mask is released, and the
interrupt request acknowledgement enable state is set.
INTyy is not acknowledged, and multiple interrupts are not generated. The INTyy request is held pending and
acknowledged after the INTxx servicing is performed.
During interrupt INTxx servicing, interrupt request INTyy is acknowledged, and multiple interrupts are generated.
Caution Multiple interrupts can be acknowledged even for low-priority interrupts.
Because interrupts are not enabled in interrupt INTxx servicing (the EI instruction is not issued), interrupt request
IE = 0: Interrupt request acknowledgment disabled
Example 2. Multiple interrupts are not generated because interrupts are not enabled
INTxx
INTxx
Main processing
Main processing
EI
EI
Example 1. Multiple interrupts are acknowledged
Figure 8-9. Example of Multiple Interrupts (1/2)
IE = 0
IE = 0
CHAPTER 8 INTERRUPT FUNCTIONS
Preliminary User’s Manual U18681EJ1V0UD
INTyy
INTyy
INTxx servicing
IE = 0
INTxx servicing
RETI
RETI
EI
IE = 0
INTyy is held pending
INTyy servicing
RETI
INTyy servicing
RETI
105
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