UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 106
UPD78F9502MA-CAC-A
Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F9502MA-CAC-A.pdf
(229 pages)
Specifications of UPD78F9502MA-CAC-A
Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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The vector interrupt enable state is set for INTP0, INTP1, and INTTMH1.
(Interruption priority INTP0 > INTP1 > INTTMH1 (refer to Table8-1))
INTP0 interrupt was first masked.
performed.
8.4.3
execution of the next instruction even if the interrupt request (maskable interrupt and external interrupt) is generated
during the execution. The following shows such instructions (interrupt request pending instruction).
106
In the interrupt INTTMH1 servicing, servicing is performed such that the INTP1 interrupt is given priority, since the
Afterwards, once the interrupt mask for INTP0 is released, INTP0 processing through multiple interrupts is
IE = 0: Interrupt request acknowledgment disabled
Some instructions may keep pending the acknowledgment of an instruction request until the completion of the
Manipulation instruction for interrupt request flag register 0 (IF0)
Manipulation instruction for interrupt mask flag register 0 (MK0)
Interrupt request pending
INTTMH1
Main processing
Example 3. A priority is controlled by the Multiple interrupts
EI
Figure 8-9. Example of Multiple Interrupts (2/2)
IE = 0
CHAPTER 8 INTERRUPT FUNCTIONS
Preliminary User’s Manual U18681EJ1V0UD
INTP0
INTP1
INTTNH1 servicing
PMK0 = 1
PMK0 = 0
RETI
EI
IE = 0
IE = 0
INTP1 servicing
INTP0 servicing
RETI
RETI
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